Datasheet AD9225 (Analog Devices) - 4

AD9225 AC SPECIFICATIONS (AVDD = 5 V, DRVDD = 5 V, fSAMPLE = 25 MSPS, VREF = 2.0 V, TMIN to TMAX, Differential Input unless otherwise noted.) Parameter Min Typ Max Unit
SIGNAL-TO-NOISE AND DISTORTION RATIO (S/N+D) fINPUT = 2.5 MHz 67.4 70.7 dB fINPUT = 10 MHz 66.7 69.6 dB SIGNAL-TO-NOISE RATIO (SNR) fINPUT = 2.5 MHz 69.0 71 dB fINPUT = 10 MHz 68.2 70 dB TOTAL HARMONIC DISTORTION (THD) fINPUT = 2.5 MHz –82 –72 dB fINPUT = 10 MHz –81 –71.5 dB SPURIOUS FREE DYNAMIC RANGE fINPUT = 2.5 MHz 73 –85 dB fINPUT = 10 MHz 72.5 –83 dB Full Power Bandwidth 105 MHz Small Signal Bandwidth 105 MHz Aperture Delay 1 ns Aperture Jitter 1 ps rms Acquisition to Full-Scale Step 10 ns Specifications subject to change without notice.
DIGITAL SPECIFICATIONS (AVDD = 5 V, DRVDD = 5 V, unless otherwise noted.) Parameter Symbol Min Typ Max Unit
LOGIC INPUTS High Level Input Voltage VIH 3.5 V Low Level Input Voltage VIL 1.0 V High Level Input Current (VIN = DRVDD) IIH –10 +10 mA Low Level Input Current (VIN = 0 V) IIL –10 +10 mA Input Capacitance CIN 5 pF LOGIC OUTPUTS High Level Output Voltage (IOH = 50 mA) VOH 4.5 V High Level Output Voltage (IOH = 0.5 mA) VOH 2.4 V Low Level Output Voltage (IOL = 1.6 mA) VOL 0.4 V Low Level Output Voltage (IOL = 50 mA) VOL 0.1 V Output Capacitance COUT 5 pF LOGIC OUTPUTS (with DRVDD = 3 V) High Level Output Voltage (IOH = 50 mA) VOH 2.95 V High Level Output Voltage (IOH = 0.5 mA) VOH 2.80 V Low Level Output Voltage (IOL = 1.6 mA) VOL 0.4 V Low Level Output Voltage (IOL = 50 mA) VOL 0.05 V Specifications subject to change without notice.
SWITCHING SPECIFICATIONS (TMIN to TMAX with AVDD = 5 V, DRVDD = 5 V, CL = 20 pF) Parameter Symbol Min Typ Max Unit
Clock Period* tC 40 ns CLOCK Pulse Width High tCH 18 ns CLOCK Pulse Width Low tCL 18 ns Output Delay tOD 13 ns Pipeline Delay (Latency) 3 Clock Cycles *The clock period may be extended to 1 ms without degradation in specified performance @ 25 ∞C. Specifications subject to change without notice. Rev. C –3– Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS DC SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION PIN FUNCTION DESCRIPTIONS TERMINOLOGY Integral Nonlinearity (INL) Differential Nonlinearity (DNL, No Missing Codes) Zero Error Gain Error Temperature Drift Power Supply Rejection Aperture Jitter Aperture Delay Signal-to-Noise and Distortion Ratio (S/N+D, SINAD) Effective Number of Bits (ENOB) Total Harmonic Distortion (THD) Signal-to-Noise Ratio (SNR) Spurious-Free Dynamic Range (SFDR) TYPICAL PERFORMANCE CHARACTERISTICS INTRODUCTION ANALOG INPUT AND REFERENCE OVERVIEW ANALOG INPUT OPERATION REFERENCE OPERATION DRIVING THE ANALOG INPUTS SINGLE-ENDED MODE OF OPERATION DC COUPLING AND INTERFACE ISSUES Simple Op Amp Buffer Op Amp with DC Level Shifting AC COUPLING AND INTERFACE ISSUES Simple AC Interface Alternative AC Interface OP AMP SELECTION GUIDE DIFFERENTIAL MODE OF OPERATION REFERENCE CONFIGURATIONS USING THE INTERNAL REFERENCE Single-Ended Input with 0 to 2 3 VREF Range Resistor Programmable Reference USING AN EXTERNAL REFERENCE Variable Input Span with VCM = 2.5 V Single-Ended Input with 0 to 2 ¥ VREF Range DIGITAL INPUTS AND OUTPUTS Digital Outputs Out-Of-Range (OTR) Digital Output Driver Considerations (DRVDD) Clock Input and Considerations Direct IF Down Conversion Using the AD9225 GROUNDING AND DECOUPLING Analog and Digital Grounding Analog and Digital Driver Supply Decoupling OUTLINE DIMENSIONS Ordering Guide REVISION HISTORY