Datasheet AD9225 (Analog Devices)

Complete 12-Bit, 25 MSPS Monolithic A/D Converter AD9225 FEATURES FUNCTIONAL BLOCK DIAGRAM Monolithic 12-Bit, 25 MSPS ADC Low Power Dissipation: 280 mW CLK AVDD DRVDD Single 5 V Supply SHA No Missing Codes Guaranteed VINA MDAC1 MDAC2 MDAC3 VINB GAIN = 16 GAIN = 4 GAIN = 4 Differential Nonlinearity Error: 0.4 LSB 5 3 3 Complete On-Chip Sample-and-Hold Amplifier and ADC ADC ADC ADC CAPT Voltage Reference 5 3 3 4 CAPB DIGITAL CORRECTION LOGIC Signal-to-Noise and Distortion Ratio: 71 dB 12 Spurious-Free Dynamic Range: –85 dB VREF OUTPUT BUFFERS OTR Out-of-Range Indicator SENSE BIT 1 Straight Binary Output Data (MSB) 1V MODE SELECT BIT 12 AD9225 28-Lead SOIC (LSB) 28-Lead SSOP REFCOM AVSS DRVSS CML Compatible with 3 V Logic GENERAL DESCRIPTION
A single clock input is used to control all internal conversion The AD9225 is a monolithic, single-supply, 12-bit, 25 MSPS cycles. The digital output data is presented in straight binary analog-to-digital converter with an on-chip, high performance output format. An out-of-range signal indicates an overflow sample-and-hold amplifier and voltage reference. The AD9225 condition that can be used with the most significant bit to deter- uses a multistage differential pipelined architecture with output mine low or high overflow. error correction logic to provide 12-bit accuracy at 25 MSPS data rates, and guarantees no missing codes over the full operat-
PRODUCT HIGHLIGHTS
ing temperature range. The AD9225 is fabricated on a very cost effective CMOS pro- cess. High speed precision analog circuits are combined with The AD9225 combines a low cost, high speed CMOS process high density logic circuits. and a novel architecture to achieve the resolution and speed of existing bipolar implementations at a fraction of the power The AD9225 offers a complete, single-chip sampling, 12-bit, consumption and cost. 25 MSPS analog-to-digital conversion function in 28-lead SOIC and SSOP packages. The input of the AD9225 allows for easy interfacing to both imaging and communications systems. With the device’s truly
Low Power
—The AD9225 at 280 mW consumes a fraction of differential input structure, the user can select a variety of input the power presently available in monolithic solutions. ranges and offsets, including single-ended applications. The
On-Board Sample-and-Hold Amplifier (SHA)
—The versa- dynamic performance is excellent. tile SHA input can be configured for either single-ended or The sample-and-hold amplifier (SHA) is well suited for both differential inputs. multiplexed systems that switch full-scale voltage levels in succes-
Out-of-Range (OTR)
—The OTR output bit indicates when sive channels and sampling single-channel inputs at frequencies the input signal is beyond the AD9225’s input range. up to and well beyond the Nyquist rate.
Single Supply
—The AD9225 uses a single 5 V power supply, The AD9225’s wideband input, combined with the power and simplifying system power supply design. It also features a sepa- cost savings over previously available monolithics, suits applica- rate digital driven supply line to accommodate 3 V and 5 V logic tions in communications, imaging, and medical ultrasound. families. The AD9225 has an on-board programmable reference. An
Pin Compatibility
—The AD9225 is pin compatible with the external reference can also be chosen to suit the dc accuracy AD9220, AD9221, AD9223, and AD9224 ADCs. and temperature drift requirements of an application. Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise
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Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS DC SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION PIN FUNCTION DESCRIPTIONS TERMINOLOGY Integral Nonlinearity (INL) Differential Nonlinearity (DNL, No Missing Codes) Zero Error Gain Error Temperature Drift Power Supply Rejection Aperture Jitter Aperture Delay Signal-to-Noise and Distortion Ratio (S/N+D, SINAD) Effective Number of Bits (ENOB) Total Harmonic Distortion (THD) Signal-to-Noise Ratio (SNR) Spurious-Free Dynamic Range (SFDR) TYPICAL PERFORMANCE CHARACTERISTICS INTRODUCTION ANALOG INPUT AND REFERENCE OVERVIEW ANALOG INPUT OPERATION REFERENCE OPERATION DRIVING THE ANALOG INPUTS SINGLE-ENDED MODE OF OPERATION DC COUPLING AND INTERFACE ISSUES Simple Op Amp Buffer Op Amp with DC Level Shifting AC COUPLING AND INTERFACE ISSUES Simple AC Interface Alternative AC Interface OP AMP SELECTION GUIDE DIFFERENTIAL MODE OF OPERATION REFERENCE CONFIGURATIONS USING THE INTERNAL REFERENCE Single-Ended Input with 0 to 2 3 VREF Range Resistor Programmable Reference USING AN EXTERNAL REFERENCE Variable Input Span with VCM = 2.5 V Single-Ended Input with 0 to 2 ¥ VREF Range DIGITAL INPUTS AND OUTPUTS Digital Outputs Out-Of-Range (OTR) Digital Output Driver Considerations (DRVDD) Clock Input and Considerations Direct IF Down Conversion Using the AD9225 GROUNDING AND DECOUPLING Analog and Digital Grounding Analog and Digital Driver Supply Decoupling OUTLINE DIMENSIONS Ordering Guide REVISION HISTORY