Datasheet ADPA7006CHIP (Analog Devices) - 6

ADPA7006CHIP Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS VGGB V V V V DD1B DD2B DD3B DD4B 2 3 4 5 6 7 VREF ADPA7006 RFIN 1 8 RFOUT TOP VIEW (Not to Scale) 14 13 12 11 10 9 VDET
-002 186
V V V V GGA DD1A DD2A DD3A VDD4A
20 Figure 2. Pin Configuration
Table 7. Pin Function Descriptions Pin No. Mnemonic Description
1 RFIN RF Signal Input. This pad is ac-coupled and matched to 50 Ω. 2, 14 VGGA, VGGB Amplifier Gate Control. 3, 4, 5, 6, 10, VDD1B, VDD2B, Drain Bias for the Amplifier. 11, 12, 13 VDD3B, VDD4B, VDD4A, VDD3A, VDD2A, VDD1A 7 VREF Reference Diode. Use this pad for temperature compensation of the VDET RF output power measurements. When used in combination with VDET, this voltage provides temperature compensation to the VDET RF output power measurements. 8 RFOUT RF Signal Output. This pad is ac-coupled and matched to 50 Ω. 9 VDET Detector Diode for Measuring the RF Output Power. Detection via this pad requires the application of a dc bias voltage through an external series resistor. When used in combination with VREF, the difference voltage, VREF − VDET, is a temperature compensated dc voltage proportional to the RF output power. Die Bottom GND The pads and die bottom must be connected to RF and dc ground.
INTERFACE SCHEMATICS GND
3
V
00
GGA, V
86-
GGB
01 007 2 186- 20 Figure 3. GND Interface Schematic Figure 7. VGGA, VGGB Interface Schematic 8 04
VREF
0 00 186-
RFOUT
0186- 20 2 Figure 4. VREF Interface Schematic Figure 8. RFOUT Interface Schematic
VDET VDD1A, VDD1B
005
TO V
20186-
DD4A, VDD4B
9 00 6- 018 2 Figure 5. VDET Interface Schematic Figure 9. VDD1A, VDD1B to VDD4A, VDD4B Interface Schematic 6 00
RFIN
20186- Figure 6. RFIN Interface Schematic Rev. 0 | Page 6 of 24 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS 18 GHz TO 20 GHz FREQUENCY RANGE 20 GHz TO 28 GHz FREQUENCY RANGE 28 GHz TO 36 GHz FREQUENCY RANGE 36 GHz TO 44 GHz FREQUENCY RANGE ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTIC CONSTANT DRAIN CURRENT (IDD) OPERATION THEORY OF OPERATION APPLICATIONS INFORMATION MOUNTING AND BONDING TECHNIQUES FOR MILLIMETERWAVE GaAs MMICS Handling Precautions Mounting Wire Bonding BIASING THE ADPA7006CHIP WITH THE HMC980LP4E APPLICATION CIRCUIT SETUP LIMITING VGATE FOR THE ADPA7006CHIP VGGx AMR (ABSOLUTE MAXIMUM RATING) REQUIREMENT HMC980LP4E BIAS SEQUENCE Power-Up Sequence Power-Down Sequence CONSTANT DRAIN CURRENT BIASING vs. CONSTANT GATE VOLTAGE BIASING TYPICAL APPLICATION CIRCUIT ASSEMBLY DIAGRAMS OUTLINE DIMENSIONS ORDERING GUIDE