Datasheet XDPL8219 (Infineon) - 7

link to page 42 link to page 8 link to page 43 link to page 42 link to page 42 link to page 41 link to page 11 link to page 41 link to page 43 link to page 42 link to page 11 link to page 12 link to page 12 link to page 41
XDPL8219 Digital Flyback Controller IC XDP™ Digital Power 3 Functional description 3 Functional description
The functional description provides an overview about the integrated functions and features as well as their relationship. The mentioned parameters and equations are based on typical values at TA = 25°C. The corresponding min. and max. values are shown in the electrical characteristics.
3.1 Startup
The XDPL8219 enters startup phase upon checking the pre-startup conditions (e.g. estimated input voltage,
IC
temperature) are within limits. During the startup phase, the soft start phase is initiated and followed by the output charging phase. The soft start phase is to minimize the component stress during startup, while the output charging phase is to fast charge the output voltage to Vout,start parameter for fast VCC voltage self supply takeover from the primary auxiliary winding. After the startup phase is ended without any protection triggering, the regulated mode will be entered for output regulation based on the feedback voltage mapping.
3.2 Regulated mode
In regulated mode, the FB pin voltage signal is periodically sampled and digitally filtered. Based on the filtered feedback voltage VFB,filtered mapping in
Figure 4
, the mode of operation (
QRMn
,
Discontinuous Conduction Mode (DCM)
or
ABM
) and the respective switching parameters (on-time ton, valley number Nvalley, minimum switching period tsw,min, pulse number nABM) are periodically updated in each
Operation cycle
. The update rate of each switching parameter is independent, and can differ based on the operating mode and conditions.
FB pin voltage pull-up and sampling
The controller has a typical voltage reference VREF of 2.428 V, which is internally connected to its FB pin via an internal pull-up resistor. The internal pull-up resistor value is configurable between 2.25 kohm and 7.5 kohm, based on the RFB,pull,up parameter. For the power savings in ABM, the controller disables the internal pull-up during sleep. To have a high signal-to-noise ratio, the FB pin voltage is periodically sampled, at the end of the CS leading edge blanking time tCS,LEB.
Feedback voltage filtering
The filtering of the sampled feedback voltage depends on the operating mode and conditions: • QRMn/DCM: When the HV pin
Line synchronization
is properly in place with an AC input, or when a constant DC input voltage is detected by the controller, for a duration more than the nnotch,blank parameter, a digital notch filter is enabled. Otherwise, the sampled feedback voltage is processed by a digital low pass filter, to reduce the high frequency component. The digital notch filter suppresses either the double-line-frequency sine-wave component of an AC input, or the sine-wave component generated by the
Switching frequency dithering for constant DC input voltage
, to stabilize the filtered feedback voltage VFB,filtered. • ABM: The sampled feedback voltage is processed by a digital low pass filter during the burst pulsing, to reduce the high frequency component. Data Sheet 7 Revision 1.1 2020-08-26 Document Outline Features Product validation Potential applications Description Table of contents 1 Pin configuration 2 Functional block diagram 3 Functional description 3.1 Startup 3.2 Regulated mode 3.3 Operation cycle 3.4 Line synchronization 3.5 Enhanced power quality 3.6 Switching frequency dithering for constant DC input voltage 3.7 Configurable gate voltage rising slope at GD pin 3.8 UART reporting 3.9 Input voltage and output voltage estimation 3.9.1 Output voltage estimation 3.9.2 Input voltage estimation 3.10 Protection features 3.10.1 Primary MOSFET overcurrent protection 3.10.2 Output undervoltage protection 3.10.3 Output overvoltage protection 3.10.4 Transformer demagnetization time shortage protection 3.10.5 Minimum input voltage startup check and input undervoltage protection 3.10.6 Maximum input voltage startup check and input overvoltage protection 3.10.7 VCC undervoltage lockout 3.10.8 VCC undervoltage protection 3.10.9 VCC overvoltage protection 3.10.10 IC overtemperature protection 3.10.11 Other protections 3.10.12 Protection reactions 3.11 Debug mode 4 List of Parameters 5 Electrical Characteristics and Parameters 5.1 Package Characteristics 5.2 Absolute Maximum Ratings 5.3 Operating Conditions 5.4 DC Electrical characteristics 6 Package Dimensions 7 References 8 Revision History Glossary ABM ADC BOM CCM CRC CV DCM EMI FB GUI HID IC IIR OCP1 OTP PCB PC PFC PF PWM QRM1 QRMn RAM SSR THD UART USB UVLO Disclaimer