Datasheet ADAR1000 (Analog Devices) - 7

Data Sheet ADAR1000 tSCLK tPWH tPWL SCLK tDCS CSB tDH tDS
003
SDIO R/W A_MSB A13 A12 A2 A1 A_LSB D_MSB D6 D5 D1 D_LSB
16790- Figure 3. Timing Diagram for the Serial Port Interface Register Write
SCLK CSB DON’T DON’T DON’T DON’T SDIO R/W A_MSB A13 A12 A2 A1 A_LSB DON’T CARE CARE CARE CARE CARE tDV SDO D_MSB D6 D5 D1 D_LSB
004
tR tF
16790- Figure 4. Timing Diagram for Serial Port Interface Register Read
SPI Block Write Mode
Data can be written to the SPI registers in a block write mode, where the register address automatical y increments, and data for consecutive registers can be written without sending new address bits. Data writing can be continued indefinitely until CSB is raised again, ending the write process.
CSB SCLK SDIO R/W A14 A13 ... A1 A0 D7 D6 ... D1 D0 D7 D6 ... D2 D1 D0 X
005
ADDRESS OF FIRST REGISTER DATA OF FIRST REGISTER DATA OF n + FIRIST REGISTER
16790- Figure 5. Timing Diagram for Block Write Mode
SPI Write All Mode
Data can be written to the SPI registers in a write al mode, where the data is written to al chips connected to the SPI bus with a single write command, regardless of the ADDR1 and ADDR0 values, by setting address Bits[A14:A11] = 0001. The write all mode allows the user to broadcast the same data, up to four ADAR1000 devices, with a single SPI write.
CSB SCLK SDIO R/W 0 0 0 1 A10 ... A1 A0 D7 D6 ... D1 D0 D7 D6 ... D2 D1 D0 X
106
[A14:A11] = 0001 ADDRESS OF FIRST REGISTER DATA OF FIRST REGISTER DATA OF n + FIRIST REGISTER
16790- Figure 6. SPI Write All Instruction and Timing Diagram Rev. A | Page 7 of 65 Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Timing Specifications Timing Diagrams SPI Block Write Mode SPI Write All Mode Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation RF Path Phase and Gain Control Power Detectors External Amplifier Bias DACs External Switch Control Transmit and Receive Control RF Subcircuit Bias Control and Enables ADC Operation Chip Addressing Memory Access Calibration Applications Information Gain Control Registers Switched Attenuator Control Phase Control Registers Transmit and Receive Subcircuit Control TR_SOURCE = 1 (TR Pin Control) TR_SOURCE = 0 (SPI Control) Transmit and Receive Switch Driver Control PA Bias Output Control LNA Bias Output Control Transmit/Receive Delay Control Transmit and Receive Mode Switching SPI Programming Example Powering the ADAR1000 Register Map Register Descriptions Outline Dimensions Ordering Guide