Datasheet AEM00330 (E-peas) - 10

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DATASHEET AEM00330 5. Recommended Operation Conditions
Symbol Parameter Min Typ Max Unit External Components LDCDC Inductor of the DCDC converter 10 µH CSRC Capacitor decoupling the SRC terminal 15 µF CINT Capacitor decoupling the VINT terminal 10 µF CLOAD Capacitor decoupling the LOAD terminal 40 µF CSTO Optional - Capacitor on STO if no storage element is connected (see Section 8.7.1) 100 µF STO_OVCH Configuration of VOVCH in custom mode STO_OVDIS Configuration of VOVDIS in custom mode 1 Section 8.4 100 MΩ STO_RDY Configuration of VCHRDY in custom mode Symbol Logic Level Low High Logic input pins LOAD_CFG[2:0] Configuration pins for the LOAD voltage GND VINT SRC_LVL_CFG[5:0] Configuration pins for the SRC voltage level GND VINT STO_CFG[3:0] Configuration pins for the STO voltage GND VINT STO_PRIO Configuration pin for the control er GND VINT EN_STO_FT Configuration pin for the control er GND VINT EN_SLEEP Configuration pin for the control er GND LOAD EN_STO_CH Configuration pin for the control er GND LOAD EN_HP Configuration pin for the control er GND VINT Table 7: Recommended Operation Conditions DS_AEM00330_Rev1.0 Copyright © 2022 e-peas SA 10 Document Outline Table of Contents List of Tables 1. Introduction 2. Absolute Maximum Ratings 3. Thermal Resistance 4. Typical Electrical Characteristics at 25 °C 5. Recommended Operation Conditions 6. Functional Block Diagram 7. Theory of Operation 7.1. DCDC Converter 7.2. Reset, Wake Up and Start States 7.2.1. Storage Element Priority Supercapacitor as a Storage Element Battery as a Storage Element 7.2.2. Load Priority 7.3. Supply State 7.4. Shutdown State 7.5. Sleep State 7.6. Source Voltage Regulation 7.7. Balancing for Dual-Cell Supercapacitor 8. System Configuration 8.1. High Power / Low Power Mode 8.2. Storage Element Configuration 8.3. Load Configuration 8.4. Custom Mode Configuration 8.5. Disable Storage Element Charging 8.6. Source Level Configuration 8.7. External Components 8.7.1. Storage element information 8.7.2. External inductor information 8.7.3. External capacitors information CSRC CINT CLOAD 9. Typical Application Circuits 9.1. Example Circuit 1 9.2. Example Circuit 2 9.3. Circuit Behaviour 9.4. DCDC Conversion Efficiency From SRC to STO in Low Power Mode 9.4. DCDC Conversion Efficiency From SRC to STO in Low Power Mode 9.5. DCDC Conversion Efficiency From SRC to STO in High Power Mode 9.6. DCDC Conversion Efficiency From STO to LOAD in Low Power Mode 9.7. DCDC Conversion Efficiency From STO to LOAD in High Power Mode 10. Schematic 11. Layout 12. Package Information 12.1. Plastic Quad Flatpack No-Lead (QFN 40-pin 5x5mm) 12.2. Board Layout 13. Revision History