Datasheet AEM00330 (E-peas) - 9

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DATASHEET AEM00330 4. Typical Electrical Characteristics at 25 °C Symbol Parameter Conditions Min Typ Max Unit
Power Conversion V P Source power required for cold STO > Vchrdy 3 µW SRC,CS start VSTO < Vchrdy 6 µW During cold start 0.275 4.5 V V Input voltage of the energy SRC source After cold start 0.14 4.5 V VSRC,REGVSRC,RE Regulation voltage of the source See Table 11 Depends on SRC_LVL_CFG[5:0] G configuration V Storage element Maximum voltage accepted on VOVCH the storage element before V disabling its charging Minimum voltage required on the VCHRDY storage element before asserting see Table 9 Depends on STO_CFG[3:0] configuration V the ST_STO Minimum voltage accepted on VOVDIS the storage element before V entering into SHUTDOWN STATE Load Output Voltage VLOAD = 1.8V VSTO > 1.6V 60 HP_EN = 1 VLOAD = 2.5V ILOAD,MAX LOAD current drive capability VSTO > 1.6V 60 mA HP_EN = 1 VLOAD = 3.3V VSTO > 1.8V 60 HP_EN = 1 VLOAD Output voltage see Table 10 Depends on LOAD_CFG[2:0] configuration V Internal supply & Quiescent Current VVINT Internal voltage supply 2.2 V VSTO = 3.7V I VLOAD = 2.5V Q Quiescent current on STO EN_SLEEP = 0 875 nA HP_EN = 0 Symbol Logic Level Low High Logic output pins ST_STO Logic output levels on the status STO pin GND VSTO ST_LOAD Logic output levels on the status LOAD pin GND VLOAD ST_STO_RDY Logic output levels on the status STO_READY pin GND VLOAD ST_STO_OVDIS Logic output levels on the status STO_OVDIS pin GND VLOAD Table 6: Typical Electrical Characteristics DS_AEM00330_Rev1.0 Copyright © 2022 e-peas SA 9 Document Outline Table of Contents List of Tables 1. Introduction 2. Absolute Maximum Ratings 3. Thermal Resistance 4. Typical Electrical Characteristics at 25 °C 5. Recommended Operation Conditions 6. Functional Block Diagram 7. Theory of Operation 7.1. DCDC Converter 7.2. Reset, Wake Up and Start States 7.2.1. Storage Element Priority Supercapacitor as a Storage Element Battery as a Storage Element 7.2.2. Load Priority 7.3. Supply State 7.4. Shutdown State 7.5. Sleep State 7.6. Source Voltage Regulation 7.7. Balancing for Dual-Cell Supercapacitor 8. System Configuration 8.1. High Power / Low Power Mode 8.2. Storage Element Configuration 8.3. Load Configuration 8.4. Custom Mode Configuration 8.5. Disable Storage Element Charging 8.6. Source Level Configuration 8.7. External Components 8.7.1. Storage element information 8.7.2. External inductor information 8.7.3. External capacitors information CSRC CINT CLOAD 9. Typical Application Circuits 9.1. Example Circuit 1 9.2. Example Circuit 2 9.3. Circuit Behaviour 9.4. DCDC Conversion Efficiency From SRC to STO in Low Power Mode 9.4. DCDC Conversion Efficiency From SRC to STO in Low Power Mode 9.5. DCDC Conversion Efficiency From SRC to STO in High Power Mode 9.6. DCDC Conversion Efficiency From STO to LOAD in Low Power Mode 9.7. DCDC Conversion Efficiency From STO to LOAD in High Power Mode 10. Schematic 11. Layout 12. Package Information 12.1. Plastic Quad Flatpack No-Lead (QFN 40-pin 5x5mm) 12.2. Board Layout 13. Revision History