Datasheet AEM00330 (E-peas) - 7

DATASHEET AEM00330
NAME PIN NUMBER Function Configuration pins SRC_LVL_CFG[0] 11 SRC_LVL_CFG[1] 12 SRC_LVL_CFG[2] 15 Used for the configuration of the source voltage level. SRC_LVL_CFG[3] 30 SRC_LVL_CFG[4] 32 SRC_LVL_CFG[5] 31 LOAD_CFG[0] 24 LOAD_CFG[1] 25 Used for the configuration of LOAD output voltage VLOAD. LOAD_CFG[2] 26 STO_CFG[0] 33 STO_CFG[1] 34 Used for the configuration of the threshold voltages for the STO_CFG[2] 35 energy storage element (VOVDIS, VCHRDY and VOVCH). STO_CFG[3] 27 - Pul ed up to VINT: storage device (STO) has highest priority at start-up STO_PRIO 29 - Pul ed down to GND: load (LOAD) has highest priority at start-up STO_OVCH 23 Used for the configuration of the threshold voltages (VOVDIS, VCHRDY and VOVCH) for the STO_OVDIS 21 energy storage element when STO_CFG[3:0] are set to custom mode (optional). Must be left floating if not used. STO_RDY 22 - Pul ed up to LOAD: SLEEP STATE enabled EN_SLEEP 39 - Pul ed down to GND: SLEEP STATE disabled - Pul ed up to LOAD: enables the charging of the battery EN_STO_CH 20 - Pul ed down to GND: disables the charging of the battery - Pul ed up to VINT: HIGH POWER MODE enabled EN_HP 28 - Pul ed down to GND: HIGH POWER MODE disabled Other 2, 4, 5, 6, 10, GND 14, 16 Ground connection, best possible connection to PCB ground plane. Exposed pad Table 2: Configuration and Ground Pins DS D _A _ E A M0 M 033 3 0_Rev e 1.0. 0 0 Copyr y ight h © 2022 2 e-pe p as a SA S Confidential 7 Document Outline Table of Contents List of Tables 1. Introduction 2. Absolute Maximum Ratings 3. Thermal Resistance 4. Typical Electrical Characteristics at 25 °C 5. Recommended Operation Conditions 6. Functional Block Diagram 7. Theory of Operation 7.1. DCDC Converter 7.2. Reset, Wake Up and Start States 7.2.1. Storage Element Priority Supercapacitor as a Storage Element Battery as a Storage Element 7.2.2. Load Priority 7.3. Supply State 7.4. Shutdown State 7.5. Sleep State 7.6. Source Voltage Regulation 7.7. Balancing for Dual-Cell Supercapacitor 8. System Configuration 8.1. High Power / Low Power Mode 8.2. Storage Element Configuration 8.3. Load Configuration 8.4. Custom Mode Configuration 8.5. Disable Storage Element Charging 8.6. Source Level Configuration 8.7. External Components 8.7.1. Storage element information 8.7.2. External inductor information 8.7.3. External capacitors information CSRC CINT CLOAD 9. Typical Application Circuits 9.1. Example Circuit 1 9.2. Example Circuit 2 9.3. Circuit Behaviour 9.4. DCDC Conversion Efficiency From SRC to STO in Low Power Mode 9.4. DCDC Conversion Efficiency From SRC to STO in Low Power Mode 9.5. DCDC Conversion Efficiency From SRC to STO in High Power Mode 9.6. DCDC Conversion Efficiency From STO to LOAD in Low Power Mode 9.7. DCDC Conversion Efficiency From STO to LOAD in High Power Mode 10. Schematic 11. Layout 12. Package Information 12.1. Plastic Quad Flatpack No-Lead (QFN 40-pin 5x5mm) 12.2. Board Layout 13. Revision History