Datasheet HMC1086 (Analog Devices) - 9
| Fabricante | Analog Devices |
| Descripción | 25 WATT GaN MMIC POWER AMPLIFIER, 2 - 6 GHz |
| Páginas / Página | 9 / 9 — HMC1086. 25 WATT GAN MMIC POWER AMPLIFIER,. 2 - 6 GHz. Mounting & … |
| Formato / tamaño de archivo | PDF / 643 Kb |
| Idioma del documento | Inglés |
HMC1086. 25 WATT GAN MMIC POWER AMPLIFIER,. 2 - 6 GHz. Mounting & Bonding Techniques for GaN MMICs. Handling Precautions
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HMC1086
v06.0318
25 WATT GAN MMIC POWER AMPLIFIER, 2 - 6 GHz Mounting & Bonding Techniques for GaN MMICs
0.102mm (0.004”) Thick GaN MMIC IP The die should be eutectical y attached directly to the ground plane (see H HMC general Handling, Mounting, Bonding Note). Wire Bond 0.076mm 50 Ohm Microstrip transmission lines on 0.127 mm (5 mil) thick alumina (0.003”) thin film substrates are recommended for bringing RF to and from the chip (Figure 1). If 0.254 mm (10 mil) thick alumina thin film substrates R - C must be used, the die should be raised 0.150 mm (6 mils) so that the E surface of the die is coplanar with the surface of the substrate. One way RF Ground Plane W to accomplish this is to attach the 0.102 mm (4 mil) thick die to a copper tungsten or CuMo heat spreader which is then attached to the thermal y O conductive ground plane (Figure 2). 0.127mm (0.005”) Thick Alumina Microstrip substrates should be placed as close to the die as possible in Thin Film Substrate order to minimize bond wire length. Typical die-to-substrate spacing is Figure 1. R & P 0.076 mm to 0.152 mm (3 to 6 mils). A
Handling Precautions
0.102mm (0.004”) Thick GaN MMIC E Fol ow these precautions to avoid permanent damage. Wire Bond IN 0.076mm
Storage:
All bare die are placed in either Waffle or Gel based ESD (0.003”) protective containers, and then sealed in an ESD protective bag for shipment. Once the sealed ESD protective bag has been opened, all die S - L should be stored in a dry nitrogen environment. R
Cleanliness:
Handle the chips in a clean environment. DO NOT attempt RF Ground Plane to clean the chip using liquid cleaning systems. IE 0.150mm (0.005”) Thick
Static Sensitivity:
Fol ow ESD precautions to protect against ESD Copper Tungsten strikes. LIF 0.254mm (0.010”) Thick Alumina Thin Film Substrate P
Transients:
Suppress instrument and bias supply transients while bias Figure 2. is applied. Use shielded signal and bias cables to minimize inductive M pick-up. A
Die placement:
A heated vacuum col ect (180 °C) is the preferred method of pick up. Ensure that the area of vacuum contact on the die is minimized to prevent cracking under differential pressure. All air bridges (if applicable) must be avoided during placement. Minimize impact forces applied to the die during auto-placement.
Mounting
The chip is back-metal ized with a minimum of 5 microns of gold and is the RF ground and thermal interface. It is recommended that the chip be die mounted with AuSn eutectic preforms. The mounting surface should be clean and flat.
Eutectic Reflow Process:
An 80/20 gold tin 0.5 mil (13 um) thick preform is recommended with a work surface temperature of 280 °C. Limit exposure to temperatures above 300 °C to 30 seconds maximum. A die bonder or furnace with 95 % N / 5 % H reducing atmosphere should be used. No organic flux should be used. Coefficient of 2 2 thermal expansion matching is critical for long term reliability.
Die Attach Inspection:
X-ray or acoustic scan is recommended.
Wire Bonding
Thermosonic ball or wedge bonding is the preferred interconnect technique. Gold wire must be used in a diameter appropriate for the pad size and number of bonds applied. Force, time and ultrasonics are critical parameters: optimize for a repeatable, high bond pull strength. Limit the die bond pad surface temperature to 200 °C maximum. For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com
9
Application Support: Phone: 1-800-ANALOG-D Document Outline General Description Gain and Return Loss Gain vs. Vdd Input Return Loss Output Return Loss Pout vs. Frequency Power Gain vs. Frequency Power Added Efficiency vs. Pin Pout vs. Pin Pout vs. Temperature at Pin= 25dBm Pout vs. Vdd at Pin= 25dBm Psat vs. Temperature Psat vs. Vdd Drain Current vs. Pin OIP3 vs Pin/Tone IM3 vs. Pin/Tone Reverse Isolation Power Dissipation vs. Pin Second Harmonic vs. Pin Absolute Maximum Ratings[ Outline Drawing Pad Descriptions Application Circuit Assembly Diagram Mounting & Bonding Techniques for GaN MMICs
v06.0318
25 WATT GAN MMIC POWER AMPLIFIER, 2 - 6 GHz Mounting & Bonding Techniques for GaN MMICs
0.102mm (0.004”) Thick GaN MMIC IP The die should be eutectical y attached directly to the ground plane (see H HMC general Handling, Mounting, Bonding Note). Wire Bond 0.076mm 50 Ohm Microstrip transmission lines on 0.127 mm (5 mil) thick alumina (0.003”) thin film substrates are recommended for bringing RF to and from the chip (Figure 1). If 0.254 mm (10 mil) thick alumina thin film substrates R - C must be used, the die should be raised 0.150 mm (6 mils) so that the E surface of the die is coplanar with the surface of the substrate. One way RF Ground Plane W to accomplish this is to attach the 0.102 mm (4 mil) thick die to a copper tungsten or CuMo heat spreader which is then attached to the thermal y O conductive ground plane (Figure 2). 0.127mm (0.005”) Thick Alumina Microstrip substrates should be placed as close to the die as possible in Thin Film Substrate order to minimize bond wire length. Typical die-to-substrate spacing is Figure 1. R & P 0.076 mm to 0.152 mm (3 to 6 mils). A
Handling Precautions
0.102mm (0.004”) Thick GaN MMIC E Fol ow these precautions to avoid permanent damage. Wire Bond IN 0.076mm
Storage:
All bare die are placed in either Waffle or Gel based ESD (0.003”) protective containers, and then sealed in an ESD protective bag for shipment. Once the sealed ESD protective bag has been opened, all die S - L should be stored in a dry nitrogen environment. R
Cleanliness:
Handle the chips in a clean environment. DO NOT attempt RF Ground Plane to clean the chip using liquid cleaning systems. IE 0.150mm (0.005”) Thick
Static Sensitivity:
Fol ow ESD precautions to protect against ESD Copper Tungsten strikes. LIF 0.254mm (0.010”) Thick Alumina Thin Film Substrate P
Transients:
Suppress instrument and bias supply transients while bias Figure 2. is applied. Use shielded signal and bias cables to minimize inductive M pick-up. A
Die placement:
A heated vacuum col ect (180 °C) is the preferred method of pick up. Ensure that the area of vacuum contact on the die is minimized to prevent cracking under differential pressure. All air bridges (if applicable) must be avoided during placement. Minimize impact forces applied to the die during auto-placement.
Mounting
The chip is back-metal ized with a minimum of 5 microns of gold and is the RF ground and thermal interface. It is recommended that the chip be die mounted with AuSn eutectic preforms. The mounting surface should be clean and flat.
Eutectic Reflow Process:
An 80/20 gold tin 0.5 mil (13 um) thick preform is recommended with a work surface temperature of 280 °C. Limit exposure to temperatures above 300 °C to 30 seconds maximum. A die bonder or furnace with 95 % N / 5 % H reducing atmosphere should be used. No organic flux should be used. Coefficient of 2 2 thermal expansion matching is critical for long term reliability.
Die Attach Inspection:
X-ray or acoustic scan is recommended.
Wire Bonding
Thermosonic ball or wedge bonding is the preferred interconnect technique. Gold wire must be used in a diameter appropriate for the pad size and number of bonds applied. Force, time and ultrasonics are critical parameters: optimize for a repeatable, high bond pull strength. Limit the die bond pad surface temperature to 200 °C maximum. For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com
9
Application Support: Phone: 1-800-ANALOG-D Document Outline General Description Gain and Return Loss Gain vs. Vdd Input Return Loss Output Return Loss Pout vs. Frequency Power Gain vs. Frequency Power Added Efficiency vs. Pin Pout vs. Pin Pout vs. Temperature at Pin= 25dBm Pout vs. Vdd at Pin= 25dBm Psat vs. Temperature Psat vs. Vdd Drain Current vs. Pin OIP3 vs Pin/Tone IM3 vs. Pin/Tone Reverse Isolation Power Dissipation vs. Pin Second Harmonic vs. Pin Absolute Maximum Ratings[ Outline Drawing Pad Descriptions Application Circuit Assembly Diagram Mounting & Bonding Techniques for GaN MMICs