Datasheet MASTERGAN2 (STMicroelectronics) - 7
| Fabricante | STMicroelectronics |
| Descripción | High power density 600V Half bridge driver with two enhancement mode GaN HEMT |
| Páginas / Página | 29 / 7 — MASTERGAN2. Driver. Symbol. Parameter. Test condition. Min Typ Max Unit. … |
| Formato / tamaño de archivo | PDF / 1.6 Mb |
| Idioma del documento | Inglés |
MASTERGAN2. Driver. Symbol. Parameter. Test condition. Min Typ Max Unit. Logic inputs. Overtemperature protection. DS13597. Rev 1
Línea de modelo para esta hoja de datos
Versión de texto del documento
link to page 7 link to page 7 link to page 7 link to page 7 link to page 7 link to page 7 link to page 7
MASTERGAN2 Driver Symbol Parameter Test condition Min Typ Max Unit Logic inputs
TJ = 25°C 1.1 1.31 1.45 Vil Low level logic threshold V Full Temperature range (5) 0.8 LIN, HIN, SD/OD TJ = 25°C 2 2.17 2.5 Vih High level logic threshold V Full Temperature range(5) 2.7 Vihys Logic input threshold hysteresis 0.7 0.96 1.2 V IINh Logic ‘1’ input bias current LIN, HIN = 5 V 23 33 55 μA IINl LIN, HIN Logic ‘0’ input bias current LIN, HIN = GND 1 μA RPD_IN Input pull-down resistor LIN, HIN = 5 V 90 150 220 kΩ ISDh SD/OD Logic “1” input bias current SD/OD = 5 V 11 15 20 μA ISDl SD/OD Logic “0” input bias current SD/OD = 0 V 1 μA SD/OD = 5 V RPD_SD SD/OD Pull-down resistor 250 330 450 kΩ OpenDrain OFF VTSD SD/OD Thermal shutdown unlatch threshold TJ = 25°C (6) 0.5 0.75 1 V T R J = 25°C; ON_OD SD/OD Open drain ON resistance 8 10 18 Ω IOD = 400 mV(6) T I J = 25°C; OL_OD SD/OD Open Drain low level sink current 22 40 50 mA VOD = 400 mV(6)
Overtemperature protection
TTSD Shutdown temperature (5) 175 °C THYS Temperature hysteresis (5) 20 °C 1. VCC UVLO is referred to VCC - GND 2. Turn on and turn off total resistances include the values of the gate resistors and the driver Rdson 3. VBO = VBOOT - VOUT 4. RBD(on) is tested in the following way: RBD(on) = [(VCC - VBOOTa) - (VCC - VBOOTb)] / [Ia - Ib] Where: Ia is BOOT pin current when VBOOT = VBOOTa; Ib is BOOT pin current when VBOOT = VBOOTb 5. Range estimated by characterization, not tested in production. 6. Tested on wafer.
DS13597
-
Rev 1 page 7/29
Document Outline Features Application Description 1 Block diagram 2 Pin description and connection diagram 2.1 Pin list 3 Electrical Data 3.1 Absolute maximum ratings 3.2 Recommended operating conditions 3.3 Thermal data 4 Electrical characteristics 4.1 Driver 4.2 GaN power transistor 5 Device characterization values 6 Functional description 6.1 Logic inputs 6.2 Bootstrap structure 6.3 VCC supply pins and UVLO function 6.4 VBO UVLO protection 6.5 Thermal shutdown 7 Typical application diagrams 8 Package information 8.1 QFN 9 x 9 x 1 mm, 31 leads, pitch 0.6 mm package information 9 Suggested footprint 10 Ordering information Revision history Contents List of tables List of figures
MASTERGAN2 Driver Symbol Parameter Test condition Min Typ Max Unit Logic inputs
TJ = 25°C 1.1 1.31 1.45 Vil Low level logic threshold V Full Temperature range (5) 0.8 LIN, HIN, SD/OD TJ = 25°C 2 2.17 2.5 Vih High level logic threshold V Full Temperature range(5) 2.7 Vihys Logic input threshold hysteresis 0.7 0.96 1.2 V IINh Logic ‘1’ input bias current LIN, HIN = 5 V 23 33 55 μA IINl LIN, HIN Logic ‘0’ input bias current LIN, HIN = GND 1 μA RPD_IN Input pull-down resistor LIN, HIN = 5 V 90 150 220 kΩ ISDh SD/OD Logic “1” input bias current SD/OD = 5 V 11 15 20 μA ISDl SD/OD Logic “0” input bias current SD/OD = 0 V 1 μA SD/OD = 5 V RPD_SD SD/OD Pull-down resistor 250 330 450 kΩ OpenDrain OFF VTSD SD/OD Thermal shutdown unlatch threshold TJ = 25°C (6) 0.5 0.75 1 V T R J = 25°C; ON_OD SD/OD Open drain ON resistance 8 10 18 Ω IOD = 400 mV(6) T I J = 25°C; OL_OD SD/OD Open Drain low level sink current 22 40 50 mA VOD = 400 mV(6)
Overtemperature protection
TTSD Shutdown temperature (5) 175 °C THYS Temperature hysteresis (5) 20 °C 1. VCC UVLO is referred to VCC - GND 2. Turn on and turn off total resistances include the values of the gate resistors and the driver Rdson 3. VBO = VBOOT - VOUT 4. RBD(on) is tested in the following way: RBD(on) = [(VCC - VBOOTa) - (VCC - VBOOTb)] / [Ia - Ib] Where: Ia is BOOT pin current when VBOOT = VBOOTa; Ib is BOOT pin current when VBOOT = VBOOTb 5. Range estimated by characterization, not tested in production. 6. Tested on wafer.
DS13597
-
Rev 1 page 7/29
Document Outline Features Application Description 1 Block diagram 2 Pin description and connection diagram 2.1 Pin list 3 Electrical Data 3.1 Absolute maximum ratings 3.2 Recommended operating conditions 3.3 Thermal data 4 Electrical characteristics 4.1 Driver 4.2 GaN power transistor 5 Device characterization values 6 Functional description 6.1 Logic inputs 6.2 Bootstrap structure 6.3 VCC supply pins and UVLO function 6.4 VBO UVLO protection 6.5 Thermal shutdown 7 Typical application diagrams 8 Package information 8.1 QFN 9 x 9 x 1 mm, 31 leads, pitch 0.6 mm package information 9 Suggested footprint 10 Ordering information Revision history Contents List of tables List of figures