Datasheet MASTERGAN2 (STMicroelectronics) - 9
| Fabricante | STMicroelectronics |
| Descripción | High power density 600V Half bridge driver with two enhancement mode GaN HEMT |
| Páginas / Página | 29 / 9 — MASTERGAN2. Device characterization values. Table 7. GaN power transistor … |
| Formato / tamaño de archivo | PDF / 1.6 Mb |
| Idioma del documento | Inglés |
MASTERGAN2. Device characterization values. Table 7. GaN power transistor characterization values. Symbol. Parameter
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MASTERGAN2 Device characterization values 5 Device characterization values
The information in Table 7 and Table 8 represents typical values based on characterization and simulation results and are not subject to the production test.
Table 7. GaN power transistor characterization values Symbol Parameter Test condition Min Typ Max Unit
VGS = 6 V, TJ = 25°C 2 nC VDS = 0 to 400 V - Low side QG Total gate charge VGS = 6 V, TJ = 25°C 1.5 nC VDS = 0 to 400 V - High side Output charge - Low side 20 nC QOSS Output charge - High side 14 nC Output capacitance stored energy - Low side VGS = 0 V, 2.7 µJ EOSS Output capacitance stored energy - High side VDS = 400 V 1.7 µJ Output capacitance - Low side 20 pF COSS Output capacitance - High side 14.2 pF Effective output capacitance energy related - Low side (1) 31 pF CO(ER) Effective output capacitance energy related - High side(1) VGS = 0 V, 21 pF Effective output capacitance time related - Low side (2) VDS = 0 to 400 V 50 pF CO(TR) Effective output capacitance time related - High side(2) 34 pF QRR Reverse recovery charge 0 nC IRRM Reverse recovery current 0 A 1. CO(ER) is the fixed capacitance that would give the same stored energy as COSS while VDS is rising from 0 V to the stated VDS 2. CO(TR) is the fixed capacitance that would give the same charging time as COSS while VDS is rising from 0 V to the stated VDS
Table 8. Inductive load switching characteristics Symbol Parameter Test condition Min Typ Max Unit
Turn-on time - Low side 70 ns t(on) (1) Turn-on time - High side 70 ns Crossover time (on) - Low side 15 ns tC(on) (2) Crossover time (on) - High side 25 ns VS = 400 V, Turn-off time - Low side 70 ns t(off)(1) VGS = 6 V, Turn-off time - High side 70 ns ID = 3.2 A, Crossover time (off) - Low side 15 ns tC(off) (2) See Figure 3 Crossover time (off) - High side 10 ns tSD Shutdown to high/low-side propagation delay 70 ns Turn-on switching losses - Low side 12.5 µJ Eon Turn-on switching losses - High side 10 µJ
DS13597
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Rev 1 page 9/29
Document Outline Features Application Description 1 Block diagram 2 Pin description and connection diagram 2.1 Pin list 3 Electrical Data 3.1 Absolute maximum ratings 3.2 Recommended operating conditions 3.3 Thermal data 4 Electrical characteristics 4.1 Driver 4.2 GaN power transistor 5 Device characterization values 6 Functional description 6.1 Logic inputs 6.2 Bootstrap structure 6.3 VCC supply pins and UVLO function 6.4 VBO UVLO protection 6.5 Thermal shutdown 7 Typical application diagrams 8 Package information 8.1 QFN 9 x 9 x 1 mm, 31 leads, pitch 0.6 mm package information 9 Suggested footprint 10 Ordering information Revision history Contents List of tables List of figures
MASTERGAN2 Device characterization values 5 Device characterization values
The information in Table 7 and Table 8 represents typical values based on characterization and simulation results and are not subject to the production test.
Table 7. GaN power transistor characterization values Symbol Parameter Test condition Min Typ Max Unit
VGS = 6 V, TJ = 25°C 2 nC VDS = 0 to 400 V - Low side QG Total gate charge VGS = 6 V, TJ = 25°C 1.5 nC VDS = 0 to 400 V - High side Output charge - Low side 20 nC QOSS Output charge - High side 14 nC Output capacitance stored energy - Low side VGS = 0 V, 2.7 µJ EOSS Output capacitance stored energy - High side VDS = 400 V 1.7 µJ Output capacitance - Low side 20 pF COSS Output capacitance - High side 14.2 pF Effective output capacitance energy related - Low side (1) 31 pF CO(ER) Effective output capacitance energy related - High side(1) VGS = 0 V, 21 pF Effective output capacitance time related - Low side (2) VDS = 0 to 400 V 50 pF CO(TR) Effective output capacitance time related - High side(2) 34 pF QRR Reverse recovery charge 0 nC IRRM Reverse recovery current 0 A 1. CO(ER) is the fixed capacitance that would give the same stored energy as COSS while VDS is rising from 0 V to the stated VDS 2. CO(TR) is the fixed capacitance that would give the same charging time as COSS while VDS is rising from 0 V to the stated VDS
Table 8. Inductive load switching characteristics Symbol Parameter Test condition Min Typ Max Unit
Turn-on time - Low side 70 ns t(on) (1) Turn-on time - High side 70 ns Crossover time (on) - Low side 15 ns tC(on) (2) Crossover time (on) - High side 25 ns VS = 400 V, Turn-off time - Low side 70 ns t(off)(1) VGS = 6 V, Turn-off time - High side 70 ns ID = 3.2 A, Crossover time (off) - Low side 15 ns tC(off) (2) See Figure 3 Crossover time (off) - High side 10 ns tSD Shutdown to high/low-side propagation delay 70 ns Turn-on switching losses - Low side 12.5 µJ Eon Turn-on switching losses - High side 10 µJ
DS13597
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Rev 1 page 9/29
Document Outline Features Application Description 1 Block diagram 2 Pin description and connection diagram 2.1 Pin list 3 Electrical Data 3.1 Absolute maximum ratings 3.2 Recommended operating conditions 3.3 Thermal data 4 Electrical characteristics 4.1 Driver 4.2 GaN power transistor 5 Device characterization values 6 Functional description 6.1 Logic inputs 6.2 Bootstrap structure 6.3 VCC supply pins and UVLO function 6.4 VBO UVLO protection 6.5 Thermal shutdown 7 Typical application diagrams 8 Package information 8.1 QFN 9 x 9 x 1 mm, 31 leads, pitch 0.6 mm package information 9 Suggested footprint 10 Ordering information Revision history Contents List of tables List of figures