Datasheet ADCMP580, ADCMP581, ADCMP582 (Analog Devices) - 4

ADCMP580/ADCMP581/ADCMP582 Data Sheet Parameter Symbol Test Conditions/Comments Min Typ Max Unit
ADCMP582 (PECL) VCCO = 3.3 V Output Voltage High Level VOH 50 Ω to VCCO − 2 V, TA = 125°C VCCO − 0.99 VCCO − 0.87 VCCO − 0.75 V Output Voltage High Level VOH 50 Ω to VCCO − 2 V, TA = 25°C VCCO − 1.06 VCCO − 0.94 VCCO − 0.82 V Output Voltage High Level VOH 50 Ω to VCCO − 2 V, TA = −55°C VCCO − 1.11 VCCO − 0.99 VCCO − 0.87 V Output Voltage Low Level VOL 50 Ω to VCCO − 2 V, TA = 125°C VCCO − 1.43 VCCO − 1.26 VCCO − 1.13 V Output Voltage Low Level VOL 50 Ω to VCCO − 2 V, TA = 25°C VCCO − 1.50 VCCO − 1.33 VCCO − 1.20 V Output Voltage Low Level VOL 50 Ω to VCCO − 2 V, TA = −55°C VCCO − 1.55 VCCO − 1.35 VCCO − 1.25 V Output Voltage Differential 50 Ω to VCCO − 2.0 V 340 395 450 mV AC PERFORMANCE Propagation Delay tPD VOD = 500 mV 180 ps Propagation Delay Temperature Coefficient ΔtPD/dT 0.25 ps/°C Propagation Delay Skew—Rising VOD = 500 mV, 5 V/ns 10 ps Transition to Falling Transition Overdrive Dispersion 50 mV < VOD < 1.0 V 10 ps 10 mV < VOD < 200 mV 15 ps Slew Rate Dispersion 2 V/ns to 10 V/ns 15 ps Pulse Width Dispersion 100 ps to 5 ns 15 ps Duty Cycle Dispersion 5% to 95% 1.0 V/ns, 15 MHz, VCM = 0.0 V 10 ps Common-Mode Dispersion VOD = 0.2 V, −2 V < VCM < 3 V 5 ps/V Equivalent Input Bandwidth1 BWEQ 0.0 V to 400 mV input, 8 GHz tR = tF = 25 ps, 20/80 Toggle Rate >50% output swing 12.5 Gbps Deterministic Jitter DJ VOD = 500 mV, 5 V/ns, 15 ps PRBS31 − 1 NRZ, 5 Gbps Deterministic Jitter DJ VOD = 200 mV, 5 V/ns, 25 ps PRBS31 − 1 NRZ, 10 Gbps RMS Random Jitter RJ VOD = 200 mV, 5 V/ns, 1.25 GHz 0.2 ps Minimum Pulse Width PWMIN ΔtPD < 5 ps 100 ps Minimum Pulse Width PWMIN ΔtPD < 10 ps 80 ps Rise/Fall Time tR, tF 20/80 37 ps POWER SUPPLY Positive Supply Voltage VCCI +4.5 +5.0 +5.5 V Negative Supply Voltage VEE −5.5 −5.0 −4.5 V ADCMP580 (CML) Positive Supply Current IVCCI VCCI = 5.0 V, 50 Ω to GND 6 8 mA Negative Supply Current IVEE VEE = −5.0 V, 50 Ω to GND −50 −40 −34 mA Power Dissipation PD 50 Ω to GND 230 260 mW ADCMP581 (NECL) Positive Supply Current IVCCI VCCI = 5.0 V, 50 Ω to −2 V 6 8 mA Negative Supply Current IVEE VEE = −5.0 V, 50 Ω to −2 V −35 −25 −19 mA Power Dissipation PD 50 Ω to −2 V 155 200 mW ADCMP582 (PECL) Logic Supply Voltage VCCO +2.5 +3.3 +5.0 V Input Supply Current IVCCI VCCI = 5.0 V, 50 Ω to VCCO − 2 V 6 8 mA Output Supply Current IVCCO VCCO = 5.0 V, 50 Ω to VCCO − 2 V 44 55 mA Negative Supply Current IVEE VEE = −5.0 V, 50 Ω to VCCO − 2 V −35 −25 −19 mA Power Dissipation PD 50 Ω to VCCO − 2 V 310 350 mW Power Supply Rejection (VCCI) PSRVCCI VCCI = 5.0 V + 5% −75 dB Power Supply Rejection (VEE) PSRVEE VEE = −5.0 V + 5% −60 dB Power Supply Rejection (VCCO) PSRVCCO VCCO = 3.3 V + 5% (ADCMP582) −75 dB 1 Equivalent input bandwidth assumes a simple first-order input response and is calculated with the following formula: BW 2 2 EQ = 0.22/(trCOMP – trIN ), where trIN is the 20/80 transition time of a quasi-Gaussian input edge applied to the comparator input and trCOMP is the effective transition time digitized by the comparator. Rev. B | Page 4 of 16 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING INFORMATION ABSOLUTE MAXIMUM RATINGS THERMAL CONSIDERATIONS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TYPICAL APPLICATION CIRCUITS APPLICATIONS INFORMATION POWER/GROUND LAYOUT AND BYPASSING ADCMP580/ADCMP581/ADCMP582 FAMILY OF OUTPUT STAGES USING/DISABLING THE LATCH FEATURE OPTIMIZING HIGH SPEED PERFORMANCE COMPARATOR PROPAGATION DELAY DISPERSION COMPARATOR HYSTERESIS MINIMUM INPUT SLEW RATE REQUIREMENT OUTLINE DIMENSIONS ORDERING GUIDE NOTES