Datasheet ADCMP608 (Analog Devices) - 9
| Fabricante | Analog Devices |
| Descripción | Rail-to-Rail, Fast, Low Power 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparator |
| Páginas / Página | 10 / 9 — Data Sheet. ADCMP608. TYPICAL APPLICATION CIRCUITS. 2.5V TO 5V. CMOS VCC. … |
| Revisión | B |
| Formato / tamaño de archivo | PDF / 237 Kb |
| Idioma del documento | Inglés |
Data Sheet. ADCMP608. TYPICAL APPLICATION CIRCUITS. 2.5V TO 5V. CMOS VCC. 0.1µF. INPUT. 2kΩ. OUTPUT. LVDS. 100Ω
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Data Sheet ADCMP608 TYPICAL APPLICATION CIRCUITS 2.5V TO 5V CMOS VCC 0.1µF 2.5V TO 5V INPUT 2kΩ 2kΩ ADCMP608 OUTPUT LVDS 100Ω ADCMP608 OUTPUT 0.1µF
012 013 06769- 06769- Figure 12. Self-Biased, 50% Slicer Figure 13. LVDS-to-CMOS Receiver Rev. B | Page 9 of 10 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION POWER/GROUND LAYOUT AND BYPASSING TTL-/CMOS-COMPATIBLE OUTPUT STAGE OPTIMIZING PERFORMANCE COMPARATOR PROPAGATION DELAY DISPERSION CROSSOVER BIAS POINT MINIMUM INPUT SLEW RATE REQUIREMENT TYPICAL APPLICATION CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE
012 013 06769- 06769- Figure 12. Self-Biased, 50% Slicer Figure 13. LVDS-to-CMOS Receiver Rev. B | Page 9 of 10 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION POWER/GROUND LAYOUT AND BYPASSING TTL-/CMOS-COMPATIBLE OUTPUT STAGE OPTIMIZING PERFORMANCE COMPARATOR PROPAGATION DELAY DISPERSION CROSSOVER BIAS POINT MINIMUM INPUT SLEW RATE REQUIREMENT TYPICAL APPLICATION CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE