Datasheet ADCMP608 (Analog Devices) - 2
| Fabricante | Analog Devices |
| Descripción | Rail-to-Rail, Fast, Low Power 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparator |
| Páginas / Página | 10 / 2 — ADCMP608. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 11/14—Rev. A to … |
| Revisión | B |
| Formato / tamaño de archivo | PDF / 237 Kb |
| Idioma del documento | Inglés |
ADCMP608. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 11/14—Rev. A to Rev. B. 6/14—Rev. 0 to Rev. A
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ADCMP608 Data Sheet TABLE OF CONTENTS
Features .. 1 Applications Information ...7 Applications ... 1 Power/Ground Layout and Bypassing ..7 Functional Block Diagram .. 1 TTL-/CMOS-Compatible Output Stage ..7 General Description ... 1 Optimizing Performance ..7 Revision History ... 2 Comparator Propagation Delay Dispersion ..7 Specifications ... 3 Crossover Bias Point ...8 Electrical Characteristics ... 3 Minimum Input Slew Rate Requirement ...8 Absolute Maximum Ratings .. 4 Typical Application Circuits ..9 Thermal Resistance .. 4 Outline Dimensions ... 10 ESD Caution .. 4 Ordering Guide .. 10 Pin Configuration and Function Descriptions ... 5 Typical Performance Characteristics ... 6
REVISION HISTORY 11/14—Rev. A to Rev. B
Changes to Figure 7 and Figure 8 ... 6
6/14—Rev. 0 to Rev. A
Changes to Temperature Parameter, Table 2 ... 4 Changes to Ordering Guide .. 10
4/07—Revision 0: Initial Version
Rev. B | Page 2 of 10 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION POWER/GROUND LAYOUT AND BYPASSING TTL-/CMOS-COMPATIBLE OUTPUT STAGE OPTIMIZING PERFORMANCE COMPARATOR PROPAGATION DELAY DISPERSION CROSSOVER BIAS POINT MINIMUM INPUT SLEW RATE REQUIREMENT TYPICAL APPLICATION CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE
ADCMP608 Data Sheet TABLE OF CONTENTS
Features .. 1 Applications Information ...7 Applications ... 1 Power/Ground Layout and Bypassing ..7 Functional Block Diagram .. 1 TTL-/CMOS-Compatible Output Stage ..7 General Description ... 1 Optimizing Performance ..7 Revision History ... 2 Comparator Propagation Delay Dispersion ..7 Specifications ... 3 Crossover Bias Point ...8 Electrical Characteristics ... 3 Minimum Input Slew Rate Requirement ...8 Absolute Maximum Ratings .. 4 Typical Application Circuits ..9 Thermal Resistance .. 4 Outline Dimensions ... 10 ESD Caution .. 4 Ordering Guide .. 10 Pin Configuration and Function Descriptions ... 5 Typical Performance Characteristics ... 6
REVISION HISTORY 11/14—Rev. A to Rev. B
Changes to Figure 7 and Figure 8 ... 6
6/14—Rev. 0 to Rev. A
Changes to Temperature Parameter, Table 2 ... 4 Changes to Ordering Guide .. 10
4/07—Revision 0: Initial Version
Rev. B | Page 2 of 10 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION POWER/GROUND LAYOUT AND BYPASSING TTL-/CMOS-COMPATIBLE OUTPUT STAGE OPTIMIZING PERFORMANCE COMPARATOR PROPAGATION DELAY DISPERSION CROSSOVER BIAS POINT MINIMUM INPUT SLEW RATE REQUIREMENT TYPICAL APPLICATION CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE