Data SheetADAS1000-3/ADAS1000-4REVISION HISTORY 1/15—Rev. A to Rev. B1/13—Rev. 0 to Rev. A Changed Frequency Range from 2.031 kHz (Typ) to 2.039 kHz Changes to Endnote 2, Table 1 .. 3 (Typ); Table 2 ... 7 Changes to Excitation Current Test Conditions/Comments .. 5 Changes to Endnote 3; Table 3 and Changes to Table 4 ... 10 Added Table 3 .. 9 Changes to Figure 16 .. 18 Changes to Figure 36, Figure 37, and Figure 39 ... 21 Changes to Figure 39 and Figure 40 ... 22 Changes to Respiration (ADAS1000-4 Model Only) Section Changes to ECG Channel Section .. 28 and Figure 63 ... 34 Changes to Digital Lead Mode and Calculation Section and Changes to Figure 64 .. 35 Electrode Mode: Common Electrode A and Common Changes to Figure 65 .. 36 Electrode B Configuration Section; Added Figure 55; Added Evaluating Pace Detection Performance Section ... 40 Renumbered Sequential y .. 29 Changes to Clocks Section ... 49 Deleted Table 11; Renumbered Sequentially ... 29 Changes to RESPAMP Bits Function Description, Table 29 ... 55 Added Figure 56 and Figure 57 ... 30 11/12—Revision 0: Initial Version Added Figure 58 and Figure 59 ... 31 Added Figure 60 .. 32 Changes to Figure 61, Figure 62, and Figure 63 .. 33 Changes to Lead-Off Detection Section .. 36 Added Figure 66 and Changes to Respiration (ADAS1000-4 Model Only) Section ... 37 Changes to External Respiration Path Section .. 39 Changes to Respiration Carrier Frequency Section; Added Table 13 and Table 14 .. 40 Changes to Pacing Artifact Detection Function (ADAS1000-4 Only) Section ... 41 Changes to Table 15 .. 42 Changes to Detection Algorithm Overview Section .. 43 Changes to Pace Edge Threshold, Pace Level Threshold, Pace Amplitude Threshold, Pace Validation Filters, and Pace Width Filter Sections .. 44 Changes to Evaluating Pace Detection Performance Section and Added Pace Width Section .. 45 Changes to Voltage Reference Section ... 57 Changes to Data Ready ( E DRDY) Section ... 53 A Changes to Secondary Serial Interface Section and Table 25 .. 55 Changes to Bit 3, Table 28 .. 58 Changes to Table 43 .. 68 Changes to Table 45 .. 69 Changes to Table 51 and Table 52 ... 72 Changes to Example 1: Initialize the Device for ECG Capture and Start Streaming Data Section ... 74 Rev. B | Page 3 of 80 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS NOISE PERFORMANCE TIMING CHARACTERISTICS Standard Serial Interface Secondary Serial Interface (Master Interface for Customer-Based Digital Pace Algorithm) ADAS1000-4 Only ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION OVERVIEW ECG INPUTS—ELECTRODES/LEADS ECG CHANNEL ELECTRODE/LEAD FORMATION AND INPUT STAGE CONFIGURATION Analog Lead Mode and Calculation Digital Lead Mode and Calculation Electrode Mode: Single-Ended Input Electrode Configuration Electrode Mode: Common Electrode A and Common Electrode B Configurations DEFIBRILLATOR PROTECTION ESIS FILTERING ECG PATH INPUT MULTIPLEXING COMMON-MODE SELECTION AND AVERAGING WILSON CENTRAL TERMINAL (WCT) RIGHT LEG DRIVE/REFERENCE DRIVE CALIBRATION DAC GAIN CALIBRATION LEAD-OFF DETECTION DC Lead-Off Detection DC Lead-Off and High Gains AC Lead-Off Detection ADC Out of Range SHIELD DRIVER RESPIRATION (ADAS1000-4 MODEL ONLY) Internal Respiration Capacitors External Respiration Path External Respiration Capacitors Respiration Carrier Frequency EVALUATING RESPIRATION PERFORMANCE PACING ARTIFACT DETECTION FUNCTION (ADAS1000-4 ONLY) Choice of Leads Detection Algorithm Overview Pace Edge Threshold Pace Level Threshold Pace Amplitude Threshold Pace Validation Filters Pace Width Filter BIVENTRICULAR PACERS PACE DETECTION MEASUREMENTS EVALUATING PACE DETECTION PERFORMANCE PACE WIDTH PACE LATENCY PACE DETECTION VIA SECONDARY SERIAL INTERFACE FILTERING VOLTAGE REFERENCE GANG MODE OPERATION Master/Slave Synchronizing Devices Calibration Common Mode Right Leg Drive Sequencing Devices into Gang Mode INTERFACING IN GANG MODE SERIAL INTERFACES STANDARD SERIAL INTERFACE Write Mode Write/Read Data Format Data Frames/Packets Read Mode Serial Clock Rate Data Rate and Skip Mode Data Ready (DRDY) Detecting Missed Conversion Data CRC Word Clocks SECONDARY SERIAL INTERFACE RESET PD FUNCTION SPI OUTPUT FRAME STRUCTURE (ECG AND STATUS DATA) SPI REGISTER DEFINITIONS AND MEMORY MAP CONTROL REGISTERS DETAILS INTERFACE EXAMPLES Example 1: Initialize the Device for ECG Capture and Start Streaming Data Example 2: Enable Respiration and Stream Conversion Data (Applies to ADAS1000-4 Only) Example 3: DC Lead-Off and Stream Conversion Data Example 4: Configure 150 Hz Test Tone Sine Wave on Each ECG Channel and Stream Conversion Data Example 5: Enable Pace Detection and Stream Conversion Data (Applies to ADAS1000-4 Only) Example 6: Writing to Master and Slave Devices and Streaming Conversion Data Slave Configuration (ADAS1000-3) Master Configuration (ADAS1000) SOFTWARE FLOWCHART POWER SUPPLY, GROUNDING, AND DECOUPLING STRATEGY AVDD ADCVDD AND DVDD SUPPLIES UNUSED PINS/PATHS LAYOUT RECOMMENDATIONS OUTLINE DIMENSIONS ORDERING GUIDE