Datasheet ADAS1000-3, ADAS1000-4 (Analog Devices) - 2

FabricanteAnalog Devices
DescripciónLow Power, Three Electrode Electrocardiogram (ECG) Analog Front End
Páginas / Página80 / 2 — ADAS1000-3/ADAS1000-4. Data Sheet. TABLE OF CONTENTS
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ADAS1000-3/ADAS1000-4. Data Sheet. TABLE OF CONTENTS

ADAS1000-3/ADAS1000-4 Data Sheet TABLE OF CONTENTS

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ADAS1000-3/ADAS1000-4 Data Sheet TABLE OF CONTENTS
Features .. 1 Evaluating Respiration Performance ... 41 Applications ... 1 Pacing Artifact Detection Function (ADAS1000-4 Only).. 41 General Description ... 1 Biventricular Pacers ... 45 Revision History ... 3 Pace Detection Measurements ... 45 Functional Block Diagram .. 4 Evaluating Pace Detection Performance ... 45 Specifications ... 5 Pace Width .. 45 Noise Performance ... 10 Pace Latency .. 45 Timing Characteristics .. 11 Pace Detection via Secondary Serial Interface ... 45 Absolute Maximum Ratings .. 14 Filtering ... 46 Thermal Resistance .. 14 Voltage Reference ... 47 ESD Caution .. 14 Gang Mode Operation ... 47 Pin Configurations and Function Descriptions ... 15 Interfacing in Gang Mode ... 50 Typical Performance Characteristics ... 18 Serial Interfaces ... 51 Applications Information .. 25 Standard Serial Interface ... 51 Overview .. 25 Secondary Serial Interface ... 55 ECG Inputs—Electrodes/Leads .. 27 RESET .. 55 ECG Channel .. 28 PD Function .. 55 Electrode/Lead Formation and Input Stage Configuration .. 29 SPI Output Frame Structure (ECG and Status Data) .. 56 Defibril ator Protection ... 33 SPI Register Definitions and Memory Map .. 57 ESIS Filtering... 33 Control Registers Details ... 58 ECG Path Input Multiplexing ... 33 Interface Examples ... 74 Common-Mode Selection and Averaging .. 34 Software Flowchart .. 77 Wilson Central Terminal (WCT) ... 35 Power Supply, Grounding, and Decoupling Strategy .. 78 Right Leg Drive/Reference Drive ... 35 AVDD .. 78 Calibration DAC ... 36 ADCVDD and DVDD Supplies ... 78 Gain Calibration ... 36 Unused Pins/Paths ... 78 Lead-Off Detection .. 36 Layout Recommendations .. 78 Shield Driver ... 37 Outline Dimensions ... 79 Respiration (ADAS1000-4 Model Only) ... 37 Ordering Guide .. 80 Rev. B | Page 2 of 80 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS NOISE PERFORMANCE TIMING CHARACTERISTICS Standard Serial Interface Secondary Serial Interface (Master Interface for Customer-Based Digital Pace Algorithm) ADAS1000-4 Only ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION OVERVIEW ECG INPUTS—ELECTRODES/LEADS ECG CHANNEL ELECTRODE/LEAD FORMATION AND INPUT STAGE CONFIGURATION Analog Lead Mode and Calculation Digital Lead Mode and Calculation Electrode Mode: Single-Ended Input Electrode Configuration Electrode Mode: Common Electrode A and Common Electrode B Configurations DEFIBRILLATOR PROTECTION ESIS FILTERING ECG PATH INPUT MULTIPLEXING COMMON-MODE SELECTION AND AVERAGING WILSON CENTRAL TERMINAL (WCT) RIGHT LEG DRIVE/REFERENCE DRIVE CALIBRATION DAC GAIN CALIBRATION LEAD-OFF DETECTION DC Lead-Off Detection DC Lead-Off and High Gains AC Lead-Off Detection ADC Out of Range SHIELD DRIVER RESPIRATION (ADAS1000-4 MODEL ONLY) Internal Respiration Capacitors External Respiration Path External Respiration Capacitors Respiration Carrier Frequency EVALUATING RESPIRATION PERFORMANCE PACING ARTIFACT DETECTION FUNCTION (ADAS1000-4 ONLY) Choice of Leads Detection Algorithm Overview Pace Edge Threshold Pace Level Threshold Pace Amplitude Threshold Pace Validation Filters Pace Width Filter BIVENTRICULAR PACERS PACE DETECTION MEASUREMENTS EVALUATING PACE DETECTION PERFORMANCE PACE WIDTH PACE LATENCY PACE DETECTION VIA SECONDARY SERIAL INTERFACE FILTERING VOLTAGE REFERENCE GANG MODE OPERATION Master/Slave Synchronizing Devices Calibration Common Mode Right Leg Drive Sequencing Devices into Gang Mode INTERFACING IN GANG MODE SERIAL INTERFACES STANDARD SERIAL INTERFACE Write Mode Write/Read Data Format Data Frames/Packets Read Mode Serial Clock Rate Data Rate and Skip Mode Data Ready (DRDY) Detecting Missed Conversion Data CRC Word Clocks SECONDARY SERIAL INTERFACE RESET PD FUNCTION SPI OUTPUT FRAME STRUCTURE (ECG AND STATUS DATA) SPI REGISTER DEFINITIONS AND MEMORY MAP CONTROL REGISTERS DETAILS INTERFACE EXAMPLES Example 1: Initialize the Device for ECG Capture and Start Streaming Data Example 2: Enable Respiration and Stream Conversion Data (Applies to ADAS1000-4 Only) Example 3: DC Lead-Off and Stream Conversion Data Example 4: Configure 150 Hz Test Tone Sine Wave on Each ECG Channel and Stream Conversion Data Example 5: Enable Pace Detection and Stream Conversion Data (Applies to ADAS1000-4 Only) Example 6: Writing to Master and Slave Devices and Streaming Conversion Data Slave Configuration (ADAS1000-3) Master Configuration (ADAS1000) SOFTWARE FLOWCHART POWER SUPPLY, GROUNDING, AND DECOUPLING STRATEGY AVDD ADCVDD AND DVDD SUPPLIES UNUSED PINS/PATHS LAYOUT RECOMMENDATIONS OUTLINE DIMENSIONS ORDERING GUIDE