Datasheet AD7924-KGD (Analog Devices)

4-Channel, 1 MSPS, 12-Bit ADC with Sequencer in 16-Lead TSSOP Known Good Die AD7924-KGD FEATURES FUNCTIONAL BLOCK DIAGRAM Fast throughput rate: 1 MSPS AVDD Specified for AVDD of 2.7 V to 5.25 V REFIN Low power 6 mW maximum at 1 MSPS with 3 V supplies VIN0 T/H 13.5 mW maximum at 1 MSPS with 5 V supplies 12-BIT SUCCESSIVE 4 single-ended inputs with sequencer VIN1 APPROXIMATION ADC Wide input bandwidth: 70 dB SNR at 50 kHz input frequency I/P MUX Flexible power/serial clock speed management VIN2 No pipeline delays High speed serial interface: SPI/QSPI™/MICROWIRE™/DSP VIN3 compatible SCLK Shutdown mode: 0.5 µA maximum DOUT SEQUENCER CONTROL LOGIC 16-lead TSSOP package DIN Qualified for automotive applications CS Known good die (KGD): these die are fully guaranteed to AD7924-KGD data sheet specifications. VDRIVE
001 10106-
GENERAL DESCRIPTION AGND
Figure 1. The AD7924-KGD is a 12-bit, high speed, low power, 4-channel successive approximation ADCs. The parts operate from a single
PRODUCT HIGHLIGHTS
2.7 V to 5.25 V power supply and feature throughput rates up to 1. High Throughput with Low Power Consumption. 1 MSPS. The part contains a low noise, wide bandwidth track-and- The AD7924-KGD offers throughput rates up to 1 MSPS. hold amplifier that can handle input frequencies in excess of 8 MHz. At the maximum throughput rate with 3 V supplies, the The conversion process and data acquisition are control ed using AD7924-KGD dissipates only 6 mW of power maximum. CS and the serial clock signal, al owing the device to easily interface 2. Four Single-Ended Inputs with Channel Sequencer. with microprocessors or DSPs. The input signal is sampled on A consecutive sequence of channels can be selected, the falling edge of CS and conversion is initiated at this point. through which the ADC will cycle and convert on. There are no pipeline delays associated with the part. 3. Single-Supply Operation with VDRIVE Function. The AD7924-KGD operates from a single 2.7 V to 5.25 V The AD7924-KGD uses advanced design techniques to achieve supply. The VDRIVE function al ows the serial interface to very low power dissipation at maximum throughput rates. At connect directly to 3 V or 5 V processor systems, maximum throughput rates, the AD7924-KGD consumes 2 mA independent of VDD. maximum with 3 V supplies; with 5 V supplies, the current 4. Flexible Power/Serial Clock Speed Management. consumption is 2.7 mA maximum. The conversion rate is determined by the serial clock, Through the configuration of the control register, the analog input allowing the conversion time to be reduced by increasing range for the part can be selected as 0 V to REFIN or 0 V to 2 × the serial clock speed. The part also features two shutdown REFIN, with either straight binary or twos complement output modes to maximize power efficiency at lower throughput coding. The AD7924-KGD features four single-ended analog rates. Current consumption is 0.5 µA maximum when in inputs with a channel sequencer to allow a preprogrammed full shutdown. selection of channels to be converted sequentially. 5. No Pipeline Delay. The conversion time for the AD7924-KGD is determined by the The part features a standard successive approximation SCLK frequency, which is also used as the master clock to control ADC with accurate control of the sampling instant via the conversion. the CS input and once-off conversion control. Additional application and technical information can be found in the AD7924 data sheet.
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Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS OUTLINE DIMENSIONS DIE SPECIFICATIONS AND ASSEMBLY RECOMMENDATIONS ORDERING GUIDE