AD7924-KGDKnown Good DieParameterMinTyp MaxUnitTest Conditions/Comments LOGIC OUTPUTS Output High Voltage, VOH VDRIVE − 0.2 V ISOURCE = 200 μA, AVDD = 2.7 V to 5.25 V Output Low Voltage, VOL 0.4 V ISINK = 200 μA Floating-State Leakage Current ±1 μA Floating-State Output Capacitance1 10 pF Output Coding Straight (natural) binary CODING bit set to 1 Twos complement CODING bit set to 0 CONVERSION RATE Conversion Time 800 ns 16 SCLK cycles with SCLK at 20 MHz Track-and-Hold Acquisition Time 300 ns Sine wave input 300 ns Full-scale step input Throughput Rate 1 MSPS POWER REQUIREMENTS VDD 2.7 5.25 V VDRIVE 2.7 5.25 V IDD Digital inputs = 0 V or VDRIVE Normal Mode (Static) 600 μA AVDD = 2.7 V to 5.25 V, SCLK on or off Normal Mode (Operational) 2.7 mA AVDD = 4.75 V to 5.25 V, fSCLK = 20 MHz 2 mA AVDD = 2.7 V to 3.6 V, fSCLK = 20 MHz Auto Shutdown Mode 960 μA fSAMPLE = 250 kSPS 0.5 μA Static Full Shutdown Mode 0.5 μA SCLK on or off (20 nA typ) Power Dissipation Normal Mode (Operational) 13.5 mW AVDD = 5 V, fSCLK = 20 MHz 6 mW AVDD = 3 V, fSCLK = 20 MHz Auto Shutdown Mode (Static) 2.5 μW AVDD = 5 V 1.5 μW AVDD = 3 V Full Shutdown Mode 2.5 μW AVDD = 5 V 1.5 μW AVDD = 3 V 1 Sample tested at 25°C to ensure compliance. Rev. A | Page 4 of 8 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS OUTLINE DIMENSIONS DIE SPECIFICATIONS AND ASSEMBLY RECOMMENDATIONS ORDERING GUIDE