Datasheet UT69RH051 (Aeroflex) - 8
| Fabricante | Aeroflex |
| Descripción | Radiation-Hardened MicroController |
| Páginas / Página | 20 / 8 — 5.0 DC ELECTRICAL CHARACTERISTICS (Pre/Post-Radiation)*. SYMBOL. … |
| Formato / tamaño de archivo | PDF / 1.0 Mb |
| Idioma del documento | Inglés |
5.0 DC ELECTRICAL CHARACTERISTICS (Pre/Post-Radiation)*. SYMBOL. PARAMETER. CONDITION. MINIMUM. MAXIMUM. UNIT. Notes:
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- 5962F9563801QQA 5962F9563801QQC 5962F9563801QQX 5962F9563801QYA 5962F9563801QYC 5962F9563801QYX 5962F9563801VQA 5962F9563801VQC 5962F9563801VQX 5962F9563801VYA 5962F9563801VYC 5962F9563801VYX 5962G9563801QQA 5962G9563801QQC 5962G9563801QQX 5962G9563801QYA 5962G9563801QYC 5962G9563801QYX 5962G9563801VQA 5962G9563801VQC 5962G9563801VQX 5962G9563801VYA 5962G9563801VYC 5962G9563801VYX 5962H9563801QQA 5962H9563801QQC 5962H9563801QQX 5962H9563801QYA 5962H9563801QYC 5962H9563801QYX 5962H9563801VQA 5962H9563801VQC 5962H9563801VQX 5962H9563801VYA 5962H9563801VYC 5962H9563801VYX 5962R9563801QQA 5962R9563801QQC 5962R9563801QQX 5962R9563801QYA 5962R9563801QYC 5962R9563801QYX 5962R9563801VQA 5962R9563801VQC 5962R9563801VQX 5962R9563801VYA 5962R9563801VYC 5962R9563801VYX UT69RH051P-CA UT69RH051P-CC UT69RH051P-CX UT69RH051W-PA UT69RH051W-PC UT69RH051W-PX
Versión de texto del documento
5.0 DC ELECTRICAL CHARACTERISTICS (Pre/Post-Radiation)*
VDD = 5.0V ±10%; TA = -55°C < TC < +125°C)
SYMBOL PARAMETER CONDITION MINIMUM MAXIMUM UNIT
VIL Low-level Input Voltage 0.8 V VIH High-level Input Voltage 2.0 V (except XTAL, RST) VIH1 High-level Input Voltage 3.85 V (XTAL, RST) VOL Low-level Output Voltage1 IOL = 100µA 0.3 V (Ports 1, 2 and 3) IOL = 1.6mA 0.45 V IOL = 3.5mA 1.0 V VOL1 Low-level Output Voltage1,2 IOL = 200µA 0.3 V (Port 0, ALE, PSEN, PROG) IOL = 3.2mA 0.45 V IOL = 7.0mA 1.0 V VOH High-level Output Voltage3 IOH = -10µA 4.2 V (Ports 1, 2, and 3 ALE/PROG and PSEN) IOH = -30µA 3.8 V IOH = -60µA 3.0 V VOH1 High-level Output Voltage IOH = -200µA 4.2 V (Port 0 in External Bus Mode) IOH = -3.2mA 3.8 V IOH = -7.0mA 3.0 V IIL Logical 0 Input Current VIN = 0.0V -50 µA (Ports 1, 2, and 3) VCC = 5.5V IIL Logical 0 Input Current VIN = 0.0V -65 µA (XTAL 1) VCC = 5.5V ILI Input Leakage Current VIN = 0.0V or VCC ±25 µA (Port 0) VCC = 5.5V ILI Input Leakage Current VIN = 0.0V or VCC ±65 µA (XTAL1) VCC = 5.5V RRST RST pulldown resistor (except EA) 10K 225K ohms C 4 Pin Capacitance @ 1MHZ, 25°C 15 pF IO IDD Power Supply Current: @16MHz 95 mA @20 MHz 120
Notes:
* Post-radiation performance guaranteed at 25°C per MIL-STD-883. 1. Under steady state (non-transient) conditions, IOL must be limited externally as follows: Maximum IOL per port pin: 10mA Maximum IOL per 8-bit port- Port 0: 26mA Ports 1, 2, & 3: 15mA Maximum total IOL for all output pins: 71mA If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater than the listed test conditions. 2. Capacitive loading on ports 0 and 2 may cause spurious noise pulses to be superimposed on the VOL of ALE and ports 1 and 3. The noise is due to external bus capacitance discharging into the port 0 and port 2 pins when these pins make 1 to 0 transitions during bus operations. In applications where capacitance loading exceeds 100 pF, the noise pulse on the ALE may exceed 0.8V. In these cases, it may be desirable to qualify ALE with a schmitt trigger or use an address latch with a schmitt trigger strobe input. 3. Capacitive loading ports 0 and 2 cause the VOH on ALE and PSEN to drop below the VDD-0.3 specification when the address lines are stabilizing. 8
VDD = 5.0V ±10%; TA = -55°C < TC < +125°C)
SYMBOL PARAMETER CONDITION MINIMUM MAXIMUM UNIT
VIL Low-level Input Voltage 0.8 V VIH High-level Input Voltage 2.0 V (except XTAL, RST) VIH1 High-level Input Voltage 3.85 V (XTAL, RST) VOL Low-level Output Voltage1 IOL = 100µA 0.3 V (Ports 1, 2 and 3) IOL = 1.6mA 0.45 V IOL = 3.5mA 1.0 V VOL1 Low-level Output Voltage1,2 IOL = 200µA 0.3 V (Port 0, ALE, PSEN, PROG) IOL = 3.2mA 0.45 V IOL = 7.0mA 1.0 V VOH High-level Output Voltage3 IOH = -10µA 4.2 V (Ports 1, 2, and 3 ALE/PROG and PSEN) IOH = -30µA 3.8 V IOH = -60µA 3.0 V VOH1 High-level Output Voltage IOH = -200µA 4.2 V (Port 0 in External Bus Mode) IOH = -3.2mA 3.8 V IOH = -7.0mA 3.0 V IIL Logical 0 Input Current VIN = 0.0V -50 µA (Ports 1, 2, and 3) VCC = 5.5V IIL Logical 0 Input Current VIN = 0.0V -65 µA (XTAL 1) VCC = 5.5V ILI Input Leakage Current VIN = 0.0V or VCC ±25 µA (Port 0) VCC = 5.5V ILI Input Leakage Current VIN = 0.0V or VCC ±65 µA (XTAL1) VCC = 5.5V RRST RST pulldown resistor (except EA) 10K 225K ohms C 4 Pin Capacitance @ 1MHZ, 25°C 15 pF IO IDD Power Supply Current: @16MHz 95 mA @20 MHz 120
Notes:
* Post-radiation performance guaranteed at 25°C per MIL-STD-883. 1. Under steady state (non-transient) conditions, IOL must be limited externally as follows: Maximum IOL per port pin: 10mA Maximum IOL per 8-bit port- Port 0: 26mA Ports 1, 2, & 3: 15mA Maximum total IOL for all output pins: 71mA If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater than the listed test conditions. 2. Capacitive loading on ports 0 and 2 may cause spurious noise pulses to be superimposed on the VOL of ALE and ports 1 and 3. The noise is due to external bus capacitance discharging into the port 0 and port 2 pins when these pins make 1 to 0 transitions during bus operations. In applications where capacitance loading exceeds 100 pF, the noise pulse on the ALE may exceed 0.8V. In these cases, it may be desirable to qualify ALE with a schmitt trigger or use an address latch with a schmitt trigger strobe input. 3. Capacitive loading ports 0 and 2 cause the VOH on ALE and PSEN to drop below the VDD-0.3 specification when the address lines are stabilizing. 8