Datasheet ADE9153A (Analog Devices) - 2

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ADE9153A Data Sheet TABLE OF CONTENTS
Features .. 1  mSure Autocalibration Feature ... 21  Applications ... 1  Measurements ... 22  General Description ... 1  Power Quality Measurements ... 26  Typical Applications Circuit .. 1  Applications Information .. 29  Revision History ... 2  Interrupts/Events .. 29  Specifications ... 3  IRQ Pin Interrupts .. 29  Autocalibration ... 6  Servicing Interrupts ... 29  SPI Timing Characteristics ... 7  CF2/ZX/DREADY Event Pin ... 29  Absolute Maximum Ratings .. 8  Accessing On-Chip Data ... 30  Thermal Resistance .. 8  SPI Protocol Overview .. 30  ESD Caution .. 8  UART Interface ... 30  Pin Configuration and Function Descriptions ... 9  Communication VerifIcation Registers ... 31  Typical Performance Characteristics ... 11  CRC of Configuration Registers... 31  Energy Linearity Over Supply and Temperature ... 11  Configuration Lock .. 31  Energy Error Over Frequency and Power Factor... 13  Register Information .. 32  RMS Linearity Over Temperature and RMS Error Over Register Summary .. 32  Frequency .. 14  Register Details ... 36  Signal-To-Noise Ratio (SNR) Performance Over Dynamic Outline Dimensions ... 50  Range .. 17  Ordering Guide .. 50  Test Circuit .. 18  Terminology .. 19  Theory of Operation .. 21 
REVISION HISTORY 2/2018—Revision 0: Initial Version
Rev. 0 | Page 2 of 50 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL APPLICATIONS CIRCUIT TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AUTOCALIBRATION SPI TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS ENERGY LINEARITY OVER SUPPLY AND TEMPERATURE ENERGY ERROR OVER FREQUENCY AND POWER FACTOR RMS LINEARITY OVER TEMPERATURE AND RMS ERROR OVER FREQUENCY SIGNAL-TO-NOISE RATIO (SNR) PERFORMANCE OVER DYNAMIC RANGE TEST CIRCUIT TERMINOLOGY THEORY OF OPERATION mSURE AUTOCALIBRATION FEATURE mSure System Warning Interrupts MEASUREMENTS Current Channel Current Channel Gain, xIGAIN High-Pass Filter Digital Integrator Phase Compensation Voltage Channel RMS and Power Measurements Total RMS Total Active Power Fundamental Reactive Power Total Apparent Power Energy Accumulation, Power Accumulation, and No Load Detection Features Energy Accumulation Energy Accumulation Modes Reset Energy Register on Read Power Accumulation No Load Detection Feature Digital to Frequency Conversion—CFx Output Calibration Frequency (CF) Energy Selection Configuring the CFx Pulse Width CFx Pulse Sign Clearing the CFx Accumulator POWER QUALITY MEASUREMENTS Zero-Crossing Detection CF1/ZX/DREADY Zero-Crossing Timeout Line Period Calculation Angle Measurement One Cycle RMS Measurement Dip and Swell Indication Overcurrent Indication Peak Detection Power Factor Temperature APPLICATIONS INFORMATION INTERRUPTS/EVENTS PIN INTERRUPTS SERVICING INTERRUPTS CF2/ZX/DREADY EVENT PIN ACCESSING ON-CHIP DATA SPI PROTOCOL OVERVIEW UART INTERFACE COMMUNICATION VERIFICATION REGISTERS CRC OF CONFIGURATION REGISTERS CONFIGURATION LOCK REGISTER INFORMATION REGISTER SUMMARY REGISTER DETAILS OUTLINE DIMENSIONS ORDERING GUIDE