Datasheet ADE9153A (Analog Devices) - 3

Data Sheet ADE9153A SPECIFICATIONS
VDD = 2.97 V to 3.63 V, AGND = DGND = 0 V, on-chip reference, CLKIN = 12.288 MHz, TMIN to TMAX = −40°C to +85°C, and TA = 25°C (typical), unless otherwise noted.
Table 1. Parameter Min Typ Max Unit Test Conditions/Comments
ACCURACY (MEASUREMENT ERROR Percentage of the typical value derived from comparing PER PHASE) the actual value with the typical-based expected values when a 10:1 signal is applied Total Active Energy 0.1 % Over a dynamic range of 3000 to 1, 10 sec accumulation programmable gain amplifier (PGA), AI_PGAGAIN = 16× 0.2 % AI_PGAGAIN = 38.4× 0.25 % Over a dynamic range of 10,000 to 1, 30 sec accumulation; AI_PGAGAIN = 16× 0.5 % AI_PGAGAIN = 38.4× Fundamental Reactive Energy 0.1 % Over a dynamic range of 3000 to 1, 10 sec accumulation; AI_PGAGAIN = 16× 0.2 % AI_PGAGAIN = 38.4× 0.25 % Over a dynamic range of 10,000 to 1, 30 sec accumulation AI_PGAGAIN = 16× 0.5 % AI_PGAGAIN = 38.4× Total Apparent Energy 0.1 % Over a dynamic range of 1000 to 1, 1 sec accumulation; AI_PGAGAIN = 16× 0.2 % AI_PGAGAIN = 38.4× 0.25 % Over a dynamic range of 3000 to 1, 10 sec accumulation AI_PGAGAIN = 16× 0.5 % AI_PGAGAIN = 38.4× RMS Current (IRMS) and Apparent 0.1 % Over a dynamic range of 1000 to 1, 1 sec (averaging) Power (VA) AI_PGAGAIN = 16×, BI_PGAGAIN = 1× 0.2 % Over a dynamic range of 1000 to 1, 1 sec (averaging), AI_PGAGAIN = 38.4× 0.3 % Over a dynamic range of 3000 to 1, 1 sec (averaging), AI_PGAGAIN = 16×, BI_PGAGAIN = 1× 0.6 % Over a dynamic range of 3000 to 1, 1 sec (averaging), AI_PGAGAIN = 38.4× RMS Voltage (VRMS) 0.2 % Over a dynamic range of 1000 to 1, 1 sec (averaging) Active Power (WATT), Fundamental 0.25 % Over a dynamic range of 3000 to 1, 1 sec, AI_PGAGAIN = Reactive Power (VAR) 16× 0.5 % Over a dynamic range of 3000 to 1, 1 sec, AI_PGAGAIN = 38.4× One Cycle RMS Current and Voltage 0.5 % Over a dynamic range of 500 to 1 on current and 250 to Refreshed Each Half Cycle 1 on voltage 1 % Over a dynamic range of 1000 to 1 on current and 500 to 1 on voltage Line Period Measurement 0.001 Hz Resolution at 50 Hz Voltage to Current Angle 0.036 Degrees Resolution at 50 Hz Measurement Rev. 0 | Page 3 of 50 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL APPLICATIONS CIRCUIT TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AUTOCALIBRATION SPI TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS ENERGY LINEARITY OVER SUPPLY AND TEMPERATURE ENERGY ERROR OVER FREQUENCY AND POWER FACTOR RMS LINEARITY OVER TEMPERATURE AND RMS ERROR OVER FREQUENCY SIGNAL-TO-NOISE RATIO (SNR) PERFORMANCE OVER DYNAMIC RANGE TEST CIRCUIT TERMINOLOGY THEORY OF OPERATION mSURE AUTOCALIBRATION FEATURE mSure System Warning Interrupts MEASUREMENTS Current Channel Current Channel Gain, xIGAIN High-Pass Filter Digital Integrator Phase Compensation Voltage Channel RMS and Power Measurements Total RMS Total Active Power Fundamental Reactive Power Total Apparent Power Energy Accumulation, Power Accumulation, and No Load Detection Features Energy Accumulation Energy Accumulation Modes Reset Energy Register on Read Power Accumulation No Load Detection Feature Digital to Frequency Conversion—CFx Output Calibration Frequency (CF) Energy Selection Configuring the CFx Pulse Width CFx Pulse Sign Clearing the CFx Accumulator POWER QUALITY MEASUREMENTS Zero-Crossing Detection CF1/ZX/DREADY Zero-Crossing Timeout Line Period Calculation Angle Measurement One Cycle RMS Measurement Dip and Swell Indication Overcurrent Indication Peak Detection Power Factor Temperature APPLICATIONS INFORMATION INTERRUPTS/EVENTS PIN INTERRUPTS SERVICING INTERRUPTS CF2/ZX/DREADY EVENT PIN ACCESSING ON-CHIP DATA SPI PROTOCOL OVERVIEW UART INTERFACE COMMUNICATION VERIFICATION REGISTERS CRC OF CONFIGURATION REGISTERS CONFIGURATION LOCK REGISTER INFORMATION REGISTER SUMMARY REGISTER DETAILS OUTLINE DIMENSIONS ORDERING GUIDE