Datasheet AT90S1200 (Atmel) - 4

Figure 2.
Oscillator Connections MAX 1 HC BUFFER HC C2 XTAL2 C1 XTAL1 GND Note: When using the MCU Oscillator as a clock for an external device, an HC buffer should be connected as indicated in the figure.
Figure 3.
External Clock Drive Configuration
On-chip RC Oscillator
An On-chip RC Oscillator running at a fixed frequency of 1 MHz can be selected as the MCU clock source. If enabled, the AT90S1200 can operate with no external compo- nents. A control bit (RCEN) in the Flash Memory selects the On-chip RC Oscillator as the clock source when programmed (“0”). The AT90S1200 is normally shipped with this bit unprogram med (“1”). Parts with this bit progra mmed can be ord ered as AT90S1200A. The RCEN-bit can be changed by parallel programming only. When using the On-chip RC Oscillator for Serial Program downloading, the RCEN bit must be programmed in Parallel Programming mode first.
4 AT90S1200
0838H–AVR–03/02 Document Outline Features Pin Configuration Description Block Diagram Pin Descriptions VCC GND Port B (PB7..PB0) Port D (PD6..PD0) RESET XTAL1 XTAL2 Crystal Oscillator On-chip RC Oscillator Architectural Overview General Purpose Register File ALU – Arithmetic Logic Unit In-System Programmable Flash Program Memory Program and Data Addressing Modes Register Direct, Single Register Rd Register Indirect Register Direct, Two Registers Rd and Rr I/O Direct Relative Program Addressing, RJMP and RCALL Subroutine and Interrupt Hardware Stack EEPROM Data Memory Instruction Execution Timing I/O Memory Status Register – SREG Reset and Interrupt Handling Reset Sources Power-on Reset External Reset Watchdog Reset Interrupt Handling General Interrupt Mask Register – GIMSK Timer/Counter Interrupt Mask Register – TIMSK Timer/Counter Interrupt FLAG Register – TIFR External Interrupts Interrupt Response Time MCU Control Register – MCUCR Sleep Modes Idle Mode Power-down Mode Timer/Counter0 Timer/Counter0 Prescaler Timer/Counter0 Control Register – TCCR0 Timer/Counter0 – TCNT0 Watchdog Timer Watchdog Timer Control Register – WDTCR EEPROM Read/Write Access EEPROM Address Register – EEAR EEPROM Data Register – EEDR EEPROM Control Register – EECR Prevent EEPROM Corruption Analog Comparator Analog Comparator Control and Status Register – ACSR I/O Ports Port B Port B Data Register – PORTB Port B Data Direction Register – DDRB Port B Input Pin Address – PINB Port B as General Digital I/O Alternate Functions of Port B Port B Schematics Port D Port D Data Register – PORTD Port D Data Direction Register – DDRD Port D Input Pins Address – PIND Port D as General Digital I/O Alternate Functions for Port D Port D Schematics Memory Programming Program and Data Memory Lock Bits Fuse Bits Signature Bytes Programming the Flash and EEPROM Parallel Programming Signal Names Enter Programming Mode Chip Erase Programming the Flash Reading the Flash Programming the EEPROM Reading the EEPROM Programming the Fuse Bits Programming the Lock Bits Reading the Fuse and Lock Bits Reading the Signature Bytes Parallel Programming Characteristics Serial Downloading Serial Programming Algorithm Data Polling EEPROM Data Polling Flash Serial Programming Characteristics Electrical Characteristics Absolute Maximum Ratings* DC Characteristics External Clock Drive Waveforms External Clock Drive Typical Characteristics AT90S1200 Register Summary Instruction Set Summary Ordering Information(1) Packaging Information 20P3 20S 20Y Table of Contents