Datasheet AT90S1200 (Atmel)

Features
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Utilizes the AVR® RISC Architecture
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AVR – High-performance and Low-power RISC Architecture – 89 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers – Up to 12 MIPS Throughput at 12 MHz
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Data and Non-volatile Program Memory – 1K Byte of In-System Programmable Flash Endurance: 1,000 Write/Erase Cycles – 64 Bytes of In-System Programmable EEPROM Endurance: 100,000 Write/Erase Cycles 8-bit – Programming Lock for Flash Program and EEPROM Data Security
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Peripheral Features Microcontroller – One 8-bit Timer/Counter with Separate Prescaler – On-chip Analog Comparator with 1K Byte – Programmable Watchdog Timer with On-chip Oscillator – SPI Serial Interface for In-System Programming
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Special Microcontroller Features of In-System – Low-power Idle and Power-down Modes – External and Internal Interrupt Sources Programmable – Selectable On-chip RC Oscillator for Zero External Components
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Specifications Flash – Low-power, High-speed CMOS Process Technology – Fully Static Operation
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Power Consumption at 4 MHz, 3V, 25
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C – Active: 2.0 mA AT90S1200 – Idle Mode: 0.4 mA – Power-down Mode: <1 µA
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I/O and Packages – 15 Programmable I/O Lines – 20-pin PDIP, SOIC and SSOP
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Operating Voltages – 2.7 - 6.0V (AT90S1200-4) – 4.0 - 6.0V (AT90S1200-12)
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Speed Grades – 0 - 4 MHz, (AT90S1200-4) – 0 - 12 MHz, (AT90S1200-12) Pin Configuration
Rev. 0838H–AVR–03/02
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Document Outline Features Pin Configuration Description Block Diagram Pin Descriptions VCC GND Port B (PB7..PB0) Port D (PD6..PD0) RESET XTAL1 XTAL2 Crystal Oscillator On-chip RC Oscillator Architectural Overview General Purpose Register File ALU – Arithmetic Logic Unit In-System Programmable Flash Program Memory Program and Data Addressing Modes Register Direct, Single Register Rd Register Indirect Register Direct, Two Registers Rd and Rr I/O Direct Relative Program Addressing, RJMP and RCALL Subroutine and Interrupt Hardware Stack EEPROM Data Memory Instruction Execution Timing I/O Memory Status Register – SREG Reset and Interrupt Handling Reset Sources Power-on Reset External Reset Watchdog Reset Interrupt Handling General Interrupt Mask Register – GIMSK Timer/Counter Interrupt Mask Register – TIMSK Timer/Counter Interrupt FLAG Register – TIFR External Interrupts Interrupt Response Time MCU Control Register – MCUCR Sleep Modes Idle Mode Power-down Mode Timer/Counter0 Timer/Counter0 Prescaler Timer/Counter0 Control Register – TCCR0 Timer/Counter0 – TCNT0 Watchdog Timer Watchdog Timer Control Register – WDTCR EEPROM Read/Write Access EEPROM Address Register – EEAR EEPROM Data Register – EEDR EEPROM Control Register – EECR Prevent EEPROM Corruption Analog Comparator Analog Comparator Control and Status Register – ACSR I/O Ports Port B Port B Data Register – PORTB Port B Data Direction Register – DDRB Port B Input Pin Address – PINB Port B as General Digital I/O Alternate Functions of Port B Port B Schematics Port D Port D Data Register – PORTD Port D Data Direction Register – DDRD Port D Input Pins Address – PIND Port D as General Digital I/O Alternate Functions for Port D Port D Schematics Memory Programming Program and Data Memory Lock Bits Fuse Bits Signature Bytes Programming the Flash and EEPROM Parallel Programming Signal Names Enter Programming Mode Chip Erase Programming the Flash Reading the Flash Programming the EEPROM Reading the EEPROM Programming the Fuse Bits Programming the Lock Bits Reading the Fuse and Lock Bits Reading the Signature Bytes Parallel Programming Characteristics Serial Downloading Serial Programming Algorithm Data Polling EEPROM Data Polling Flash Serial Programming Characteristics Electrical Characteristics Absolute Maximum Ratings* DC Characteristics External Clock Drive Waveforms External Clock Drive Typical Characteristics AT90S1200 Register Summary Instruction Set Summary Ordering Information(1) Packaging Information 20P3 20S 20Y Table of Contents