link to page 6 link to page 6 link to page 6 link to page 6 link to page 6 link to page 6 link to page 6 link to page 6 link to page 6 link to page 6 link to page 6 link to page 6 link to page 6 link to page 6 link to page 6 Data SheetAD7476A/AD7477A/AD7478AAD7477ASPECIFICATIONS VDD = 2.35 V to 5.25 V, fSCLK = 20 MHz, fSAMPLE = 1 MSPS, TA = TMIN to TMAX, unless otherwise noted.1 Table 2. ParameterA Grade2UnitTest Conditions/Comments DYNAMIC PERFORMANCE fIN = 100 kHz sine wave Signal-to-Noise-and-Distortion (SINAD)3 61 dB min Total Harmonic Distortion (THD)3 −72 dB max Peak Harmonic or Spurious Noise (SFDR)3 −73 dB max Intermodulation Distortion (IMD)3 Second-Order Terms −82 dB typ fa = 100.73 kHz, fb = 90.7 kHz Third-Order Terms −82 dB typ fa = 100.73 kHz, fb = 90.7 kHz Aperture Delay 10 ns typ Aperture Jitter 30 ps typ Full Power Bandwidth 13.5 MHz typ At 3 dB 2 MHz typ At 0.1 dB DC ACCURACY Resolution 10 Bits Integral Nonlinearity ±0.5 LSB max Differential Nonlinearity ±0.5 LSB max Guaranteed no missed codes to 10 bits Offset Error3, 4 ±1 LSB max Gain Error3, 4 ±1 LSB max Total Unadjusted Error (TUE)3, 4 ±1.2 LSB max ANALOG INPUT Input Voltage Range 0 to VDD V DC Leakage Current ±0.5 µA max Input Capacitance 20 pF typ Track-and-hold in track; 6 pF typ when in hold LOGIC INPUTS Input High Voltage, VINH 2.4 V min 1.8 V min VDD = 2.35 V Input Low Voltage, VINL 0.8 V max VDD = 5 V 0.4 V max VDD = 3 V Input Current, IIN, SCLK Pin ±0.5 μA max Typically 10 nA, VIN = 0 V or VDD Input Current, IIN, CS Pin ±10 nA typ Input Capacitance, C 5 IN 5 pF max LOGIC OUTPUTS Output High Voltage VOH VDD − 0.2 V min ISOURCE = 200 μA, VDD = 2.35 V to 5.25 V Output Low Voltage, VOL 0.4 V max ISINK = 200 μA Floating-State Leakage Current ±1 μA max Floating-State Output Capacitance5 5 pF max Output Coding Straight (Natural) Binary CONVERSION RATE Conversion Time 700 ns max 14 SCLK cycles with SCLK at 20 MHz Track-and-Hold Acquisition Time3 250 ns max Throughput Rate 1 MSPS max Rev. G | Page 5 of 28 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AD7476A SPECIFICATIONS AD7477A SPECIFICATIONS AD7478A SPECIFICATIONS TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION THE CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM ANALOG INPUT DIGITAL INPUTS MODES OF OPERATION NORMAL MODE POWER-DOWN MODE POWER-UP TIME POWER VS. THROUGHPUT RATE SERIAL INTERFACE AD7478A IN A 12 SCLK CYCLE SERIAL INTERFACE MICROPROCESSOR INTERFACING AD7476A/AD7477A/AD7478A TO ADSP-2181 INTERFACE AD7476A/AD7477A/AD7478A TO DSP563xx INTERFACE APPLICATION HINTS GROUNDING AND LAYOUT OUTLINE DIMENSIONS ORDERING GUIDE AUTOMOTIVE PRODUCTS