Datasheet AD7765 (Analog Devices) - 5

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AD7765 Parameter Test Conditions/Comments Specification Unit
DC ACCURACY Resolution Guaranteed monotonic to 24 bits 24 Bits Integral Nonlinearity Normal power mode 0.0036 % typ Low power mode 0.0014 % typ Zero Error Normal power mode 0.006 % typ 0.03 % max Including on-chip amplifier 0.04 % typ Low power mode 0.002 % typ 0.024 % max Gain Error 0.018 % typ Including on-chip amplifier 0.04 % typ Zero Error Drift 0.00006 %FS/°C typ Gain Error Drift 0.00005 %FS/°C typ DIGITAL FILTER CHARACTERISTICS Pass-Band Ripple 0.1 dB typ Pass Band3 −1 dB frequency ODR × 0.4016 kHz −3 dB Bandwidth3 ODR × 0.4096 kHz Stop Band3 Beginning of stop band ODR × 0.5 kHz Stop-Band Attenuation Decimate 128× 120 dB typ Decimate 256× 115 Group Delay Decimate 128× MCLK = 40 MHz 177 µs typ Decimate 256× MCLK = 40 MHz 358 µs typ ANALOG INPUT Differential Input Voltage Modulator input pins: VIN+ − VIN−, VREF+ = 4.096 V ±3.2768 V p-p Input Capacitance At on-chip differential amplifier inputs 5 pF typ At modulator inputs 29 pF typ REFERENCE INPUT/OUTPUT VREF+ Input Voltage AVDD3 = 5 V ± 5% 4.096 V VREF+ Input DC Leakage Current ±1 µA max VREF+ Input Capacitance 5 pF typ DIGITAL INPUT/OUTPUT MCLK Input Amplitude 2.25 to 5.25 V Input Capacitance 7.3 pF typ Input Leakage Current ±1 μA/pin max VINH 0.8 × DVDD V min VINL 0.2 × DVDD V max V 4 OH 2.2 V min VOL 0.1 V max ON-CHIP DIFFERENTIAL AMPLIFIER Input Impedance >1 MΩ Bandwidth for 0.1 dB Flatness 125 kHz Common-Mode Input Voltage Voltage range at input pins: VINA− and VINA+ −0.5 to +2.2 V Common-Mode Output Voltage On-chip differential amplifier pins: VOUTA+ and VOUTA− 2.048 V POWER REQUIREMENTS AVDD1 (Modulator Supply) ±5% 2.5 V AVDD2 (General Supply) ±5% 5 V AVDD3 (Differential Amplifier Supply) ±5% 5 V min/max AVDD4 (Reference Buffer Supply) ±5% 5 V min/max DVDD ±5% 2.5 V Rev. A | Page 4 of 32 Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Timing Specifications Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Terminology Theory of Operation Σ-Δ Modulation and Digital Filtering AD7765 Antialias Protection AD7765 Input Structure On-Chip Differential Amplifier Modulator Input Structure Driving the Modulator Inputs Directly AD7765 Interface Reading Data Reading Status and Other Registers Writing to the AD7765 AD7765 Functionality Synchronization Overrange Alerts Power Modes Low Power Mode RESET/PWRDWN Mode Decimation Rate Pin Daisy Chaining Reading Data in Daisy-Chain Mode Writing Data in Daisy-Chain Mode Clocking the AD7765 MCLK Jitter Requirements Example 1 Example 2 Decoupling and Layout Information Supply Decoupling Reference Voltage Filtering Differential Amplifier Components Layout Considerations Using the AD7765 Bias Resistor Selection AD7765 Registers Control Register Status Register Gain Register—Address 0x0004 Non-Bit-Mapped, Default Value 0xA000 Overrange Register—Address 0x0005 Non-Bit-Mapped, Default Value 0xCCCC Outline Dimensions Ordering Guide