Datasheet AD7765 (Analog Devices)

24-Bit, 156 kSPS, 112 dB Sigma-Delta ADC with On-Chip Buffers and Serial Interface AD7765 FEATURES FUNCTIONAL BLOCK DIAGRAM High performance, 24-bit Σ-Δ ADC VOUTA– VOUTA+ VIN+ VIN– MCLK GND 115 dB dynamic range at 78 kHz output data rate AVDD1 VINA+ 112 dB dynamic range at 156 kHz output data rate DIFF AVDD2 MULTIBIT V 156 kHz maximum fully filtered output word rate INA– AV Σ-Δ DD3 MODULATOR AVDD4 Pin-selectable oversampling rate (128× and 256×) DV V DD REF+ Low power mode BUF RECONSTRUCTION OVERRANGE Flexible SPI REFGND Fully differential modulator input DECIMATION DEC_RATE SYNC On-chip differential amplifier for signal buffering INTERFACE LOGIC AND OFFSET AND GAIN FIR FILTER ENGINE CORRECTION REGISTERS RBIAS On-chip reference buffer RESET/PWRDWN AD7765 Full band low-pass finite impulse response (FIR) filter
001
FSO SCO SDI SDO FSI Overrange alert pin
06519- Figure 1.
Digital gain correction registers Power-down mode
The differential input is sampled at up to 40 MSPS by an analog
Synchronization of multiple devices via SYNC pin
modulator. The modulator output is processed by a series of
Daisy chaining
low-pass filters. The external clock frequency applied to the AD7765 determines the sample rate, filter corner frequencies,
APPLICATIONS
and output word rate.
Data acquisition systems
The AD7765 device boasts a full band on-board FIR filter. The
Vibration analysis
full stop-band attenuation of the filter is achieved at the Nyquist
Instrumentation
frequency. This feature offers increased protection from signals
GENERAL DESCRIPTION
that lie above the Nyquist frequency being aliased back into the The AD7765 is a high performance, 24-bit sigma-delta (Σ-Δ) input signal bandwidth. analog-to-digital converter (ADC). It combines wide input The reference voltage supplied to the AD7765 determines the bandwidth, high speed, and performance of 112 dB dynamic input range. With a 4 V reference, the analog input range is range at a 156 kHz output data rate. With excellent dc ±3.2768 V differential, biased around a common mode of specifications, the converter is ideal for high speed data 2.048 V. This common-mode biasing can be achieved using acquisition of ac signals where dc data is also required. the on-chip differential amplifier, further reducing the external Using the AD7765 eases the front-end antialias filtering signal conditioning requirements. requirements, simplifying the design process significantly. The The AD7765 is available in a 28-lead TSSOP package and is AD7765 offers pin-selectable decimation rates of 128× and specified over the industrial temperature range of −40°C 256×. Other features include an integrated buffer to drive the to +85°C. reference, as well as a fully differential amplifier to buffer and
Table 1. Related Devices
level shift the input to the modulator.
Part No. Description
An overrange alert pin indicates when an input signal has AD7760 2.5 MSPS, 100 dB, parallel output, on-chip buffers exceeded the acceptable range. The addition of internal gain AD7762 625 kSPS, 109 dB, parallel output, on-chip buffers and internal overrange registers makes the AD7765 a compact, AD7763 625 kSPS, 109 dB, serial output, on-chip buffers highly integrated data acquisition device requiring minimal AD7764 312 kSPS, 109 dB, serial output, on-chip buffers peripheral components. AD7766 128/64/32 kSPS, 8.5 mW, 109 dB SNR The AD7765 also offers a low power mode, significantly AD7767 128/64/32 kSPS, 8.5 mW, 109 dB SNR reducing power dissipation without reducing the output data rate or available input bandwidth.
Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 www.analog.com Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 ©2007–2009 Analog Devices, Inc. All rights reserved.
Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Timing Specifications Timing Diagrams Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Terminology Theory of Operation Σ-Δ Modulation and Digital Filtering AD7765 Antialias Protection AD7765 Input Structure On-Chip Differential Amplifier Modulator Input Structure Driving the Modulator Inputs Directly AD7765 Interface Reading Data Reading Status and Other Registers Writing to the AD7765 AD7765 Functionality Synchronization Overrange Alerts Power Modes Low Power Mode RESET/PWRDWN Mode Decimation Rate Pin Daisy Chaining Reading Data in Daisy-Chain Mode Writing Data in Daisy-Chain Mode Clocking the AD7765 MCLK Jitter Requirements Example 1 Example 2 Decoupling and Layout Information Supply Decoupling Reference Voltage Filtering Differential Amplifier Components Layout Considerations Using the AD7765 Bias Resistor Selection AD7765 Registers Control Register Status Register Gain Register—Address 0x0004 Non-Bit-Mapped, Default Value 0xA000 Overrange Register—Address 0x0005 Non-Bit-Mapped, Default Value 0xCCCC Outline Dimensions Ordering Guide