Datasheet AD9467 (Analog Devices) - 7

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Data Sheet AD9467 AD9467BCPZ-200 AD9467BCPZ-250 Parameter1 Temp Min Typ Max Min Typ Max Unit
WORST OTHER (EXCLUDING SECOND AND THIRD HARMONIC DISTORTION)2 fIN = 5 MHz 25°C 96/98 98/97 dBFS fIN = 97 MHz 25°C 86 97/97 97/93 dBFS fIN = 97 MHz Full 83 dBFS fIN = 140 MHz 25°C 97/96 97/95 dBFS fIN = 170 MHz 25°C 98/98 90 97/93 dBFS fIN = 170 MHz Full 87 dBFS fIN = 210 MHz 25°C 96/97 97/95 dBFS fIN = 300 MHz 25°C 95/95 97/95 dBFS TWO-TONE INTERMODULATION DISTORTION (IMD)— AIN1 AND AIN2 = −7.0 dBFS @ 2.5 V p-p FS fIN1 = 70 MHz, fIN2 = 72 MHz 25°C 95 97 dBFS fIN1 = 170 MHz, fIN2 = 172 MHz 25°C 93 91 dBFS 1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions and how these tests were completed. 2 See the SFDR Optimization—Buffer Current Adjustment section for optimum settings. Rev. D | Page 5 of 32 Document Outline Features Applications General Description Functional Block Diagram Product Highlights Table of Contents Revision History Specifications AC Specifications Digital Specifications Switching Specifications Timing Diagrams Absolute Maximum Ratings Thermal Impedance ESD Caution Pin Configuration and Function Descriptions Equivalent Circuits Typical Performance Characteristics Theory of Operation Analog Input Considerations SFDR Optimization—Buffer Current Adjustment Differential Input Configurations Clock Input Considerations Clock Duty Cycle Considerations Clock Jitter Considerations Power Dissipation and Power-Down Mode Power Supplies Full-Scale and Reference Options Digital Outputs and Timing Overrange (OR) Output Pins SPI Pins: SCLK, SDIO, CSB Serial Port Interface (SPI) Hardware Interface Memory Map Reading the Memory Map Table Reserved Locations Default Values Logic Levels Power and Ground Recommendations Exposed Paddle Thermal Heat Slug Recommendations Outline Dimensions Ordering Guide