link to page 10 AD9467Data SheetABSOLUTE MAXIMUM RATINGSTable 5.With Stresses above those listed under Absolute Maximum Ratings ParameterRespect ToRating may cause permanent damage to the device. This is a stress Electrical rating only; functional operation of the device at these or any AVDD1, AVDD3 AGND −0.3 V to +2.0 V other conditions above those indicated in the operational AVDD2, SPIVDD AGND −0.3 V to +3.9 V section of this specification is not implied. Exposure to absolute DRVDD DRGND −0.3 V to +2.0 V maximum rating conditions for extended periods may affect AGND DRGND −0.3 V to +0.3 V device reliability. AVDD2, SPIVDD AVDD1, −2.0 V to +3.9 V AVDD3 THERMAL IMPEDANCE AVDD1, AVDD3 DRVDD −2.0 V to +2.0 V Table 6. AVDD2, SPIVDD DRVDD −2.0 V to +3.9 V Air Flow Velocity (m/sec)θ 1, 21, 3, 41, 5JAθJBθJCUnit Digital Outputs (Dx+, DRGND −0.3 V to DRVDD + 0.2 V Dx−, OR+, OR−, 0.0 15.7°C/W 7.5°C/W 0.5° °C/W DCO+, DCO−) 1.0 13.7°C/W N/A N/A °C/W CLK+, CLK− AGND −0.3 V to AVDD1 + 0.2 V 2.5 12.3°C/W N/A N/A °C/W VIN+, VIN− AGND −0.3 V to +3.6 V 1 XVREF AGND −0.3 V to AVDD1 + 0.2 V Per JEDEC 51-7, plus JEDEC 51-5 2S2P test board. 2 Per JEDEC JESD51-2 (still air) or JEDEC JESD51-6 (moving air). SCLK, CSB, SDIO AGND −0.3 V to SPIVDD + 0.2 V 3 Per JEDEC JESD51-8 (still air). Environmental 4 N/A = not applicable. 5 Per MIL-STD 883, Method 1012.1. Operating Temperature −40°C to +85°C Range (Ambient) Maximum Junction 150°C ESD CAUTION Temperature Lead Temperature 300°C (Soldering, 10 sec) Storage Temperature −65°C to +150°C Range (Ambient) Rev. D | Page 8 of 32 Document Outline Features Applications General Description Functional Block Diagram Product Highlights Table of Contents Revision History Specifications AC Specifications Digital Specifications Switching Specifications Timing Diagrams Absolute Maximum Ratings Thermal Impedance ESD Caution Pin Configuration and Function Descriptions Equivalent Circuits Typical Performance Characteristics Theory of Operation Analog Input Considerations SFDR Optimization—Buffer Current Adjustment Differential Input Configurations Clock Input Considerations Clock Duty Cycle Considerations Clock Jitter Considerations Power Dissipation and Power-Down Mode Power Supplies Full-Scale and Reference Options Digital Outputs and Timing Overrange (OR) Output Pins SPI Pins: SCLK, SDIO, CSB Serial Port Interface (SPI) Hardware Interface Memory Map Reading the Memory Map Table Reserved Locations Default Values Logic Levels Power and Ground Recommendations Exposed Paddle Thermal Heat Slug Recommendations Outline Dimensions Ordering Guide