Datasheet MCP6491, MCP6492, MCP6494 (Microchip) - 9
| Fabricante | Microchip |
| Descripción | The Microchip’s MCP6491 operational amplifiers (op amps) has low input bias current (150 pA, typical at 125°C) and rail-to-rail input and output operation |
| Páginas / Página | 50 / 9 — MCP6491/2/4. Note:. 700. 600. 575. = 5.5V. 500. 550. 400. +125°C +85°C. … |
| Formato / tamaño de archivo | PDF / 1.9 Mb |
| Idioma del documento | Inglés |
MCP6491/2/4. Note:. 700. 600. 575. = 5.5V. 500. 550. 400. +125°C +85°C. 525. +25°C. 300. -40°C. uiescent Current. (µA/Amplifier). = 2.4V. 200. 475. = V. 100. 450
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MCP6491/2/4 Note:
Unless otherwise indicated, T A = +25°C, VDD = +2.4V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 10 kto VL and CL = 20 pF.
700 600 600 575 V = 5.5V 500 DD 550 400 +125°C +85°C 525 +25°C 300 -40°C uiescent Current (µA/Amplifier) V = 2.4V uiescent Current (µA/Amplifier) Q 500 DD 500 Q 200 475 V = V /4 V = V /4 100 CM DD CM DD 0 450 -50 -25 0 25 50 75 100 125 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 Ambient Temperature (°C) Power Supply Voltage (V) FIGURE 2-13:
Quiescent Current vs.
FIGURE 2-16:
Quiescent Current vs. Ambient Temperature. Power Supply Voltage.
700 120 0 650 Open-Loop Gain 100 -30 600 (°) 80 -60 550 Open-Loop Phase 60 -90 500 (µA/Amplifier) 40 -120 450 Quiescent Current n-Loop Gain (dB) n-Loop Phase 400 20 -150 e e V = 2.4V DD Op Op 350 0 -180 300 -20 -210 1.0E+00 1.0E+01 1.0E+02 1.0E+03 1.0E+04 1.0E+05 1.0E+06 1.0E+07 1.0E+08 1 10 100 1k 10k 100k 1M 10M 100M -0.5 -0.3 -0.1 0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 Common Mode Input Voltage (V) Frequency (Hz) FIGURE 2-14:
Quiescent Current vs.
FIGURE 2-17:
Open-Loop Gain, Phase vs. Common Mode Input Voltage. Frequency.
150 700 V = 5.5V 650 140 DD 600 130 550 500 120 V = 2.4V DD (µA/Amplifier) 450 Quiescent Current pen-Loop Gain (dB) 110 V V 400 = 5.5 DD 350 DC O 100 300 90 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 -50 -25 0 25 50 75 100 125 Common Mode Input Voltage (V) Temperature (°C) FIGURE 2-15:
Quiescent Current vs.
FIGURE 2-18:
DC Open-Loop Gain vs. Common Mode Input Voltage. Ambient Temperature. 2012-2013 Microchip Technology Inc. DS20002321C-page 9 Document Outline Package Types Typical Application 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings 1.2 Specifications 1.3 Test Circuits 2.0 Typical Performance Curves Figure 2-1: Input Offset Voltage Figure 2-2: Input Offset Voltage Drift Figure 2-3: Input Offset Voltage vs. Common Mode Input Voltage Figure 2-4: Input Offset Voltage vs. Common Mode Input Voltage Figure 2-5: Input Offset Voltage vs. Output Voltage Figure 2-6: Input Offset Voltage vs. Power Supply Voltage FIGURE 2-7: Input Noise Voltage Density vs. Frequency. FIGURE 2-8: Input Noise Voltage Density vs. Common Mode Input Voltage. FIGURE 2-9: CMRR, PSRR vs. Frequency. FIGURE 2-10: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-11: Input Bias, Offset Currents vs. Ambient Temperature. FIGURE 2-12: Input Bias Current vs. Common Mode Input Voltage. FIGURE 2-13: Quiescent Current vs. Ambient Temperature. FIGURE 2-14: Quiescent Current vs. Common Mode Input Voltage. FIGURE 2-15: Quiescent Current vs. Common Mode Input Voltage. FIGURE 2-16: Quiescent Current vs. Power Supply Voltage. FIGURE 2-17: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-18: DC Open-Loop Gain vs. Ambient Temperature. FIGURE 2-19: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-20: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-21: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-22: Output Voltage Swing vs. Frequency. FIGURE 2-23: Output Voltage Headroom vs. Output Current. FIGURE 2-24: Output Voltage Headroom vs. Output Current. FIGURE 2-25: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-26: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-27: Slew Rate vs. Ambient Temperature. FIGURE 2-28: Small Signal Non-Inverting Pulse Response. FIGURE 2-29: Small Signal Inverting Pulse Response. FIGURE 2-30: Large Signal Non-Inverting Pulse Response. FIGURE 2-31: Large Signal Inverting Pulse Response. FIGURE 2-32: The MCP6491/2/4 Shows No Phase Reversal. FIGURE 2-33: Closed Loop Output Impedance vs. Frequency. FIGURE 2-34: Measured Input Current vs. Input Voltage (below VSS). FIGURE 2-35: Channel-to-Channel Separation vs. Frequency (MCP6492/4 only). 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply Pins 3.4 Exposed Thermal Pad (EP) 4.0 Application Information 4.1 Inputs FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. Figure 4-3: Protecting the Analog Inputs 4.2 Rail-to-Rail Output 4.3 Capacitive Loads FIGURE 4-4: Output Resistor, RISO Stabilizes Large Capacitive Loads. FIGURE 4-5: Recommended RISO Values for Capacitive Loads. 4.4 Supply Bypass 4.5 Unused Op Amps Figure 4-6: Unused Op Amps. Figure 4-7: Example Guard Ring Layout for Inverting Gain 4.6 PCB Surface Leakage 4.7 Application Circuits FIGURE 4-8: Photovoltaic Mode Detector. FIGURE 4-9: Photoconductive Mode Detector. FIGURE 4-10: Second-Order, Low-Pass Butterworth Filter with Sallen-Key Topology. FIGURE 4-11: Second-Order, Low-Pass Butterworth Filter with Multiple-Feedback Topology. FIGURE 4-12: pH Electrode Amplifier. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab Software 5.3 MAPS (Microchip Advanced Part Selector) 5.4 Analog Demonstration and Evaluation Boards 5.5 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Product Identification System Trademarks Worldwide Sales and Service
Unless otherwise indicated, T A = +25°C, VDD = +2.4V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 10 kto VL and CL = 20 pF.
700 600 600 575 V = 5.5V 500 DD 550 400 +125°C +85°C 525 +25°C 300 -40°C uiescent Current (µA/Amplifier) V = 2.4V uiescent Current (µA/Amplifier) Q 500 DD 500 Q 200 475 V = V /4 V = V /4 100 CM DD CM DD 0 450 -50 -25 0 25 50 75 100 125 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 Ambient Temperature (°C) Power Supply Voltage (V) FIGURE 2-13:
Quiescent Current vs.
FIGURE 2-16:
Quiescent Current vs. Ambient Temperature. Power Supply Voltage.
700 120 0 650 Open-Loop Gain 100 -30 600 (°) 80 -60 550 Open-Loop Phase 60 -90 500 (µA/Amplifier) 40 -120 450 Quiescent Current n-Loop Gain (dB) n-Loop Phase 400 20 -150 e e V = 2.4V DD Op Op 350 0 -180 300 -20 -210 1.0E+00 1.0E+01 1.0E+02 1.0E+03 1.0E+04 1.0E+05 1.0E+06 1.0E+07 1.0E+08 1 10 100 1k 10k 100k 1M 10M 100M -0.5 -0.3 -0.1 0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 Common Mode Input Voltage (V) Frequency (Hz) FIGURE 2-14:
Quiescent Current vs.
FIGURE 2-17:
Open-Loop Gain, Phase vs. Common Mode Input Voltage. Frequency.
150 700 V = 5.5V 650 140 DD 600 130 550 500 120 V = 2.4V DD (µA/Amplifier) 450 Quiescent Current pen-Loop Gain (dB) 110 V V 400 = 5.5 DD 350 DC O 100 300 90 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 -50 -25 0 25 50 75 100 125 Common Mode Input Voltage (V) Temperature (°C) FIGURE 2-15:
Quiescent Current vs.
FIGURE 2-18:
DC Open-Loop Gain vs. Common Mode Input Voltage. Ambient Temperature. 2012-2013 Microchip Technology Inc. DS20002321C-page 9 Document Outline Package Types Typical Application 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings 1.2 Specifications 1.3 Test Circuits 2.0 Typical Performance Curves Figure 2-1: Input Offset Voltage Figure 2-2: Input Offset Voltage Drift Figure 2-3: Input Offset Voltage vs. Common Mode Input Voltage Figure 2-4: Input Offset Voltage vs. Common Mode Input Voltage Figure 2-5: Input Offset Voltage vs. Output Voltage Figure 2-6: Input Offset Voltage vs. Power Supply Voltage FIGURE 2-7: Input Noise Voltage Density vs. Frequency. FIGURE 2-8: Input Noise Voltage Density vs. Common Mode Input Voltage. FIGURE 2-9: CMRR, PSRR vs. Frequency. FIGURE 2-10: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-11: Input Bias, Offset Currents vs. Ambient Temperature. FIGURE 2-12: Input Bias Current vs. Common Mode Input Voltage. FIGURE 2-13: Quiescent Current vs. Ambient Temperature. FIGURE 2-14: Quiescent Current vs. Common Mode Input Voltage. FIGURE 2-15: Quiescent Current vs. Common Mode Input Voltage. FIGURE 2-16: Quiescent Current vs. Power Supply Voltage. FIGURE 2-17: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-18: DC Open-Loop Gain vs. Ambient Temperature. FIGURE 2-19: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-20: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-21: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-22: Output Voltage Swing vs. Frequency. FIGURE 2-23: Output Voltage Headroom vs. Output Current. FIGURE 2-24: Output Voltage Headroom vs. Output Current. FIGURE 2-25: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-26: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-27: Slew Rate vs. Ambient Temperature. FIGURE 2-28: Small Signal Non-Inverting Pulse Response. FIGURE 2-29: Small Signal Inverting Pulse Response. FIGURE 2-30: Large Signal Non-Inverting Pulse Response. FIGURE 2-31: Large Signal Inverting Pulse Response. FIGURE 2-32: The MCP6491/2/4 Shows No Phase Reversal. FIGURE 2-33: Closed Loop Output Impedance vs. Frequency. FIGURE 2-34: Measured Input Current vs. Input Voltage (below VSS). FIGURE 2-35: Channel-to-Channel Separation vs. Frequency (MCP6492/4 only). 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply Pins 3.4 Exposed Thermal Pad (EP) 4.0 Application Information 4.1 Inputs FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. Figure 4-3: Protecting the Analog Inputs 4.2 Rail-to-Rail Output 4.3 Capacitive Loads FIGURE 4-4: Output Resistor, RISO Stabilizes Large Capacitive Loads. FIGURE 4-5: Recommended RISO Values for Capacitive Loads. 4.4 Supply Bypass 4.5 Unused Op Amps Figure 4-6: Unused Op Amps. Figure 4-7: Example Guard Ring Layout for Inverting Gain 4.6 PCB Surface Leakage 4.7 Application Circuits FIGURE 4-8: Photovoltaic Mode Detector. FIGURE 4-9: Photoconductive Mode Detector. FIGURE 4-10: Second-Order, Low-Pass Butterworth Filter with Sallen-Key Topology. FIGURE 4-11: Second-Order, Low-Pass Butterworth Filter with Multiple-Feedback Topology. FIGURE 4-12: pH Electrode Amplifier. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab Software 5.3 MAPS (Microchip Advanced Part Selector) 5.4 Analog Demonstration and Evaluation Boards 5.5 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Product Identification System Trademarks Worldwide Sales and Service