The Microchip’s MCP6491 operational amplifiers (op amps) has low input bias current (150 pA, typical at 125°C) and rail-to-rail input and output operation
link to page 5 link to page 3 link to page 15 MCP6491/2/41.0ELECTRICAL CHARACTERISTICS1.1Absolute Maximum Ratings † VDD – VSS ... ..6.5V Current at Input Pins .. ..±2 mA Analog Inputs (VIN+, VIN-) ( Note 1 ) ...VSS – 1.0V to VDD + 1.0V All Other Inputs and Outputs ...VSS – 0.3V to VDD + 0.3V Difference Input Voltage...VDD – VSS Output Short-Circuit Current .. ...continuous Current at Output and Supply Pins ... ..±60 mA Storage Temperature .. ...-65°C to +150°C Maximum Junction Temperature (TJ).. ...+150°C ESD protection on all pins (HBM) 4 kV Note 1: See Section 4.1.2, Input Voltage Limits.† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. 1.2SpecificationsTABLE 1-1:DC ELECTRICAL SPECIFICATIONSElectrical Characteristics : Unless otherwise indicated, VDD = +2.4V to +5.5V, VSS = GND, TA = +25°C, V CM = VDD/2, VOUT VDD/2, VL = VDD/2 and RL = 10 kto VL. (Refer to Figure 1-1). ParametersSymMinTypMaxUnitsConditionsInput Offset Input Offset Voltage VOS -1.5 — +1.5 mV VDD = 3.0V, VCM = VDD/4 Input Offset Drift with Temperature VOS/TA — ±2.5 — µV/°C TA = -40°C to +125°C Power Supply Rejection Ratio PSRR 75 90 — dB VCM = VDD/4 Input Bias Current and Impedance Input Bias Current IB — ±1 — pA — 8 — pA TA = +85°C — 150 350 pA TA = +125°C Input Offset Current IOS — ±0.1 — pA Common Mode Input Impedance ZCM — 1013||6 — ||pF Differential Input Impedance ZDIFF — 1013||6 — ||pF Common Mode Common Mode Input Voltage VCMR VSS - 0.3 — VDD + 0.3 V Range Common Mode Rejection Ratio CMRR 65 84 — dB VCM = -0.3V to 2.7V, VDD = 2.4V 70 88 — dB VCM = -0.3V to 5.8V, VDD = 5.5V Open-Loop Gain DC Open-Loop Gain (Large Signal) AOL 95 115 — dB 0.2V < VOUT <(VDD – 0.2V) VDD = 5.5V, VCM = VSS 2012-2013 Microchip Technology Inc. DS20002321C-page 3 Document Outline Package Types Typical Application 1.0 Electrical Characteristics 1.1 Absolute Maximum Ratings 1.2 Specifications 1.3 Test Circuits 2.0 Typical Performance Curves Figure 2-1: Input Offset Voltage Figure 2-2: Input Offset Voltage Drift Figure 2-3: Input Offset Voltage vs. Common Mode Input Voltage Figure 2-4: Input Offset Voltage vs. Common Mode Input Voltage Figure 2-5: Input Offset Voltage vs. Output Voltage Figure 2-6: Input Offset Voltage vs. Power Supply Voltage FIGURE 2-7: Input Noise Voltage Density vs. Frequency. FIGURE 2-8: Input Noise Voltage Density vs. Common Mode Input Voltage. FIGURE 2-9: CMRR, PSRR vs. Frequency. FIGURE 2-10: CMRR, PSRR vs. Ambient Temperature. FIGURE 2-11: Input Bias, Offset Currents vs. Ambient Temperature. FIGURE 2-12: Input Bias Current vs. Common Mode Input Voltage. FIGURE 2-13: Quiescent Current vs. Ambient Temperature. FIGURE 2-14: Quiescent Current vs. Common Mode Input Voltage. FIGURE 2-15: Quiescent Current vs. Common Mode Input Voltage. FIGURE 2-16: Quiescent Current vs. Power Supply Voltage. FIGURE 2-17: Open-Loop Gain, Phase vs. Frequency. FIGURE 2-18: DC Open-Loop Gain vs. Ambient Temperature. FIGURE 2-19: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-20: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-21: Output Short Circuit Current vs. Power Supply Voltage. FIGURE 2-22: Output Voltage Swing vs. Frequency. FIGURE 2-23: Output Voltage Headroom vs. Output Current. FIGURE 2-24: Output Voltage Headroom vs. Output Current. FIGURE 2-25: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-26: Output Voltage Headroom vs. Ambient Temperature. FIGURE 2-27: Slew Rate vs. Ambient Temperature. FIGURE 2-28: Small Signal Non-Inverting Pulse Response. FIGURE 2-29: Small Signal Inverting Pulse Response. FIGURE 2-30: Large Signal Non-Inverting Pulse Response. FIGURE 2-31: Large Signal Inverting Pulse Response. FIGURE 2-32: The MCP6491/2/4 Shows No Phase Reversal. FIGURE 2-33: Closed Loop Output Impedance vs. Frequency. FIGURE 2-34: Measured Input Current vs. Input Voltage (below VSS). FIGURE 2-35: Channel-to-Channel Separation vs. Frequency (MCP6492/4 only). 3.0 Pin Descriptions TABLE 3-1: Pin Function Table 3.1 Analog Outputs 3.2 Analog Inputs 3.3 Power Supply Pins 3.4 Exposed Thermal Pad (EP) 4.0 Application Information 4.1 Inputs FIGURE 4-1: Simplified Analog Input ESD Structures. FIGURE 4-2: Protecting the Analog Inputs. Figure 4-3: Protecting the Analog Inputs 4.2 Rail-to-Rail Output 4.3 Capacitive Loads FIGURE 4-4: Output Resistor, RISO Stabilizes Large Capacitive Loads. FIGURE 4-5: Recommended RISO Values for Capacitive Loads. 4.4 Supply Bypass 4.5 Unused Op Amps Figure 4-6: Unused Op Amps. Figure 4-7: Example Guard Ring Layout for Inverting Gain 4.6 PCB Surface Leakage 4.7 Application Circuits FIGURE 4-8: Photovoltaic Mode Detector. FIGURE 4-9: Photoconductive Mode Detector. FIGURE 4-10: Second-Order, Low-Pass Butterworth Filter with Sallen-Key Topology. FIGURE 4-11: Second-Order, Low-Pass Butterworth Filter with Multiple-Feedback Topology. FIGURE 4-12: pH Electrode Amplifier. 5.0 Design Aids 5.1 SPICE Macro Model 5.2 FilterLab Software 5.3 MAPS (Microchip Advanced Part Selector) 5.4 Analog Demonstration and Evaluation Boards 5.5 Application Notes 6.0 Packaging Information 6.1 Package Marking Information Appendix A: Revision History Product Identification System Trademarks Worldwide Sales and Service