Datasheet TPS54332 (Texas Instruments) - 3

link to page 4
TPS54332 www.ti.com
SLVS875C – JANUARY 2009 – REVISED NOVEMBER 2014
Changes from Original (March 2007) to Revision A Page
• Changed the ABSOLUTE MAXIMUM RATINGS table, Input Voltage - EN pin max value From: 5V to 6V.. 4
5 Pin Configuration and Functions DDA PACKAGE (TOP VIEW)
BOOT 1 8 PH VIN 2 7 GND PowerPAD (Pin 9) EN 3 6 COMP SS 4 5 VSENSE
Pin Functions PIN I/O DESCRIPTION NAME NO.
BOOT 1 O A 0.1-μF bootstrap capacitor is required between BOOT and PH. If the voltage on this capacitor falls below the minimum requirement, the high-side MOSFET is forced to switch off until the capacitor is refreshed. VIN 2 I Input supply voltage, 3.5 V to 28 V. EN 3 I Enable pin. Pull below 1.25 V to disable. Float to enable. Programming the input undervoltage lockout with two resistors is recommended. SS 4 I Slow-start pin. An external capacitor connected to this pin sets the output rise time. VSENS 5 I Inverting node of the gm error amplifier. E COMP 6 O Error amplifier output, and input to the PWM comparator. Connect frequency compensation components to this pin. GND 7 - Ground. PH 8 O The source of the internal high-side power MOSFET. PowerP 9 - GND pin must be connected to the exposed pad for proper operation. AD Copyright © 2009–2014, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: TPS54332 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 Handling Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information 6.5 Electrical Characteristics 6.6 Switching Characteristics 6.7 Typical Characteristics: Characterization Curves 6.8 Typical Characteristics: Supplemental Application Curves 7 Detailed Description 7.1 Overview 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Fixed Frequency PWM Control 7.3.2 Voltage Reference (Vref) 7.3.3 Bootstrap Voltage (BOOT) 7.3.4 Enable and Adjustable Input Undervoltage Lockout (VIN UVLO) 7.3.5 Programmable Slow-Start Using SS Pin 7.3.6 Error Amplifier 7.3.7 Slope Compensation 7.3.8 Current Mode Compensation Design 7.3.9 Overcurrent Protection and Frequency Shift 7.3.10 Overvoltage Transient Protection 7.3.11 Thermal Shutdown 7.4 Device Functional Modes 7.4.1 Operation With VIN < 3.5 V 7.4.2 Operation With EN Control 7.4.3 Eco-Mode 8 Application and Implementation 8.1 Application Information 8.2 Typical Application 8.2.1 Design Requirements 8.2.2 Detailed Design Procedure 8.2.2.1 Switching Frequency 8.2.2.2 Output Voltage Set Point 8.2.2.3 Input Capacitors 8.2.2.4 Output Filter Components 8.2.2.5 Inductor Selection 8.2.2.6 Capacitor Selection 8.2.2.7 Compensation Components 8.2.2.8 Bootstrap Capacitor 8.2.2.9 Catch Diode 8.2.2.10 Output Voltage Limitations 8.2.2.11 Power Dissipation Estimate 8.2.3 Application Curves 9 Power Supply Recommendations 10 Layout 10.1 Layout Guidelines 10.2 Layout Example 10.3 Estimated Circuit Area 10.4 Electromagnetic Interference (EMI) Considerations 11 Device and Documentation Support 11.1 Device Support 11.1.1 Development Support 11.2 Trademarks 11.3 Electrostatic Discharge Caution 11.4 Glossary 12 Mechanical, Packaging, and Orderable Information