Datasheet TPS54332 (Texas Instruments) - 10
Fabricante | Texas Instruments |
Descripción | 3.5-A, 28-V, 1-MHz, Step-Down DC-DC Converter With Eco-Mode |
Páginas / Página | 34 / 10 — TPS54332. www.ti.com. 7.2 Functional Block Diagram. 7.3 Feature … |
Revisión | C |
Formato / tamaño de archivo | PDF / 1.5 Mb |
Idioma del documento | Inglés |
TPS54332. www.ti.com. 7.2 Functional Block Diagram. 7.3 Feature Description. 7.3.1 Fixed Frequency PWM Control
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TPS54332
SLVS875C – JANUARY 2009 – REVISED NOVEMBER 2014
www.ti.com 7.2 Functional Block Diagram
EN VIN 165 C Thermal Shutdown 1 mA 3 mA Shutdown Shutdown Logic 1.25 V Enable Enable Threshold Comparator Boot Charge ™ ECO-MODE Boot BOOT Minimum Clamp UVLO 2.1V Error 12 A/V VSENSE Amplifier PWM PWM Current Comparator Latch Sense R Q 2 mA Gate 80 mW gm = 92 mA/V Drive DC gain = 800 V/V Logic BW = 2.7 MHz S Voltage SS Reference Slope 2 kW 0.8 V S Compensation Shutdown Discharge PH Logic VSENSE Frequency Oscillator Shift COMP GND Maximum Clamp
7.3 Feature Description 7.3.1 Fixed Frequency PWM Control
The TPS54332 uses a fixed-frequency, peak-current mode control. The internal switching frequency of the TPS54332 is fixed at 1 MHz.
7.3.2 Voltage Reference (Vref)
The voltage reference system produces a ±2% initial accuracy voltage reference (±3.5% over temperature) by scaling the output of a temperature stable band-gap circuit. The typical voltage reference is designed at 0.8 V.
7.3.3 Bootstrap Voltage (BOOT)
The TPS54332 has an integrated boot regulator and requires a 0.1-μF ceramic capacitor between the BOOT and PH pin to provide the gate drive voltage for the high-side MOSFET. A ceramic capacitor with an X7R or X5R grade dielectric is recommended because of the stable characteristics over temperature and voltage. To improve dropout, the TPS54332 is designed to operate at 100% duty cycle as long as the BOOT to PH pin voltage is greater than 2.1 V typically.
7.3.4 Enable and Adjustable Input Undervoltage Lockout (VIN UVLO)
The EN pin has an internal pullup current source that provides the default condition of the TPS54332 operating when the EN pin floats. 10 Submit Documentation Feedback Copyright © 2009–2014, Texas Instruments Incorporated Product Folder Links: TPS54332 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Pin Configuration and Functions 6 Specifications 6.1 Absolute Maximum Ratings 6.2 Handling Ratings 6.3 Recommended Operating Conditions 6.4 Thermal Information 6.5 Electrical Characteristics 6.6 Switching Characteristics 6.7 Typical Characteristics: Characterization Curves 6.8 Typical Characteristics: Supplemental Application Curves 7 Detailed Description 7.1 Overview 7.2 Functional Block Diagram 7.3 Feature Description 7.3.1 Fixed Frequency PWM Control 7.3.2 Voltage Reference (Vref) 7.3.3 Bootstrap Voltage (BOOT) 7.3.4 Enable and Adjustable Input Undervoltage Lockout (VIN UVLO) 7.3.5 Programmable Slow-Start Using SS Pin 7.3.6 Error Amplifier 7.3.7 Slope Compensation 7.3.8 Current Mode Compensation Design 7.3.9 Overcurrent Protection and Frequency Shift 7.3.10 Overvoltage Transient Protection 7.3.11 Thermal Shutdown 7.4 Device Functional Modes 7.4.1 Operation With VIN < 3.5 V 7.4.2 Operation With EN Control 7.4.3 Eco-Mode 8 Application and Implementation 8.1 Application Information 8.2 Typical Application 8.2.1 Design Requirements 8.2.2 Detailed Design Procedure 8.2.2.1 Switching Frequency 8.2.2.2 Output Voltage Set Point 8.2.2.3 Input Capacitors 8.2.2.4 Output Filter Components 8.2.2.5 Inductor Selection 8.2.2.6 Capacitor Selection 8.2.2.7 Compensation Components 8.2.2.8 Bootstrap Capacitor 8.2.2.9 Catch Diode 8.2.2.10 Output Voltage Limitations 8.2.2.11 Power Dissipation Estimate 8.2.3 Application Curves 9 Power Supply Recommendations 10 Layout 10.1 Layout Guidelines 10.2 Layout Example 10.3 Estimated Circuit Area 10.4 Electromagnetic Interference (EMI) Considerations 11 Device and Documentation Support 11.1 Device Support 11.1.1 Development Support 11.2 Trademarks 11.3 Electrostatic Discharge Caution 11.4 Glossary 12 Mechanical, Packaging, and Orderable Information