Datasheet LT1961 (Linear Technology) - 5
| Fabricante | Linear Technology |
| Descripción | 1.5A, 1.25MHz Step-Up Switching Regulator |
| Páginas / Página | 16 / 5 — PIN FUNCTIONS. FB:. VSW:. SYNC:. VIN:. GND:. SHDN: |
| Revisión | A |
| Formato / tamaño de archivo | PDF / 163 Kb |
| Idioma del documento | Inglés |
PIN FUNCTIONS. FB:. VSW:. SYNC:. VIN:. GND:. SHDN:
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LT1961
U U U PIN FUNCTIONS FB:
The feedback pin is used to set output voltage using an
VSW:
The switch pin is the collector of the on-chip power external voltage divider that generates 1.2V at the pin with NPN switch and has large currents flowing through it. the desired output voltage. If required, the current limit Keep the traces to the switching components as short as can be reduced during start up when the FB pin is below possible to minimize radiation and voltage spikes. 0.5V (see the Current Limit Foldback graph in the Typical
SYNC:
The sync pin is used to synchronize the internal Performance Characteristics section). An impedance of oscillator to an external signal. It is directly logic compat- less than 5kΩ at the FB pin is needed for this feature to ible and can be driven with any signal between 20% and operate. 80% duty cycle. The synchronizing range is equal to initial
VIN:
This pin powers the internal circuitry and internal operating frequency, up to 2MHz. See Synchronization regulator. Keep the external bypass capacitor close to this section in Applications Information for details. When not pin. in use, this pin should be grounded.
GND:
Short GND pins 3 and 4 and the exposed pad on the
SHDN:
The shutdown pin is used to turn off the regulator PCB. The GND is the reference for the regulated output, so and to reduce input drain current to a few microamperes. load regulation will suffer if the “ground” end of the load The 1.35V threshold can function as an accurate under- is not at the same voltage as the GND of the IC. This voltage lockout (UVLO), preventing the regulator from condition occurs when the load current flows through the operating until the input voltage has reached a predeter- metal path between the GND pins and the load ground mined level. Float or pull high to put the regulator in the point. Keep the ground path short between the GND pins operating mode. and the load and use a ground plane when possible. Keep
V
the path between the input bypass and the GND pins short.
C:
The VC pin is the output of the error amplifier and the input of the peak switch current comparator. It is normally The exposed pad should be attached to a large copper area used for frequency compensation, but can do double duty to improve thermal resistance. as a current clamp or control loop override. This pin sits at about 0.3V for very light loads and 0.9V at maximum load. 1961fa 5
U U U PIN FUNCTIONS FB:
The feedback pin is used to set output voltage using an
VSW:
The switch pin is the collector of the on-chip power external voltage divider that generates 1.2V at the pin with NPN switch and has large currents flowing through it. the desired output voltage. If required, the current limit Keep the traces to the switching components as short as can be reduced during start up when the FB pin is below possible to minimize radiation and voltage spikes. 0.5V (see the Current Limit Foldback graph in the Typical
SYNC:
The sync pin is used to synchronize the internal Performance Characteristics section). An impedance of oscillator to an external signal. It is directly logic compat- less than 5kΩ at the FB pin is needed for this feature to ible and can be driven with any signal between 20% and operate. 80% duty cycle. The synchronizing range is equal to initial
VIN:
This pin powers the internal circuitry and internal operating frequency, up to 2MHz. See Synchronization regulator. Keep the external bypass capacitor close to this section in Applications Information for details. When not pin. in use, this pin should be grounded.
GND:
Short GND pins 3 and 4 and the exposed pad on the
SHDN:
The shutdown pin is used to turn off the regulator PCB. The GND is the reference for the regulated output, so and to reduce input drain current to a few microamperes. load regulation will suffer if the “ground” end of the load The 1.35V threshold can function as an accurate under- is not at the same voltage as the GND of the IC. This voltage lockout (UVLO), preventing the regulator from condition occurs when the load current flows through the operating until the input voltage has reached a predeter- metal path between the GND pins and the load ground mined level. Float or pull high to put the regulator in the point. Keep the ground path short between the GND pins operating mode. and the load and use a ground plane when possible. Keep
V
the path between the input bypass and the GND pins short.
C:
The VC pin is the output of the error amplifier and the input of the peak switch current comparator. It is normally The exposed pad should be attached to a large copper area used for frequency compensation, but can do double duty to improve thermal resistance. as a current clamp or control loop override. This pin sits at about 0.3V for very light loads and 0.9V at maximum load. 1961fa 5