Datasheet LT1961 (Linear Technology) - 10

LT1961
U U W U APPLICATIONS INFORMATION SYNCHRONIZATION
high speed switching current path, shown in Figure 5, must be kept as short as possible. This is implemented in The SYNC pin, is used to synchronize the internal oscilla- the suggested layout of Figure 6. Shortening this path will tor to an external signal. The SYNC input must pass from also reduce the parasitic trace inductance of approxi- a logic level low, through the maximum synchronization mately 25nH/inch. At switch off, this parasitic inductance threshold with a duty cycle between 20% and 80%. The produces a flyback spike across the LT1961 switch. When input can be driven directly from a logic level output. The operating at higher currents and output voltages, with synchronizing range is equal to initial operating frequency poor layout, this spike can generate voltages across the up to 2MHz. This means that minimum practical sync LT1961 that may exceed its absolute maximum rating. A frequency is equal to the worst-case high self-oscillating ground plane should always be used under the switcher frequency (1.5MHz), not the typical operating frequency circuitry to prevent interplane coupling and overall noise. of 1.25MHz. Caution should be used when synchronizing above 1.7MHz because at higher sync frequencies the The VC and FB components should be kept as far away as amplitude of the internal slope compensation used to possible from the switch node. The LT1961 pinout has prevent subharmonic switching is reduced. Higher induc- been designed to aid in this. The ground for these compo- tor values will tend to eliminate this problem. See Fre- nents should be separated from the switch current path. quency Compensation section for a discussion of an Failure to do so will result in poor stability or subharmonic entirely different cause of subharmonic switching before like oscillation. assuming that the cause is insufficient slope compensa- Board layout also has a significant effect on thermal tion. Application Note 19 has more details on the theory resistance. The exposed pad is the copper plate that runs of slope compensation. under the LT1961 die. This is the best thermal path for heat out of the package. Soldering the pad onto the board will
LAYOUT CONSIDERATIONS
reduce die temperature and increase the power capability As with all high frequency switchers, when considering of the LT1961. Provide as much copper area as possible layout, care must be taken to achieve optimal electrical, around this pad. Adding multiple solder filled feedthroughs thermal and noise performance. For maximum efficiency, under and around the pad to the ground plane will also switch rise and fall times are typically in the nanosecond help. Similar treatment to the catch diode and inductor range. To prevent noise both radiated and conducted, the terminations will reduce any additional heating effects. L1 D1 C3 VOUT SW LT1961 HIGH FREQUENCY VIN C1 SWITCHING LOAD PATH GND 1961 F05
Figure 5. High Speed Switching Path
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