Data SheetAD8330TYPICAL PERFORMANCE CHARACTERISTICS VS = 5 V, TA = 25°C, CL = 12 pF, VDBS = 0.75 V, VMODE = high (or O/C) VMAG = O/C (0.5 V), RL = ∞, VOFST = 0, differential operation, unless otherwise noted. 502.0NORMALIZED @ VDBS = 0.75V451.5LO MODEHI MODE401.03550MHz100MHzB) d 0.53010MHz, 50MHzB)R (dON (25R0RAI G20N E AI –0.5G151MHz1MHz–1.01010MHz100MHz–1.550–2.000.250.500.751.001.251.50 005 00.20.40.60.81.01.21.41.6 008 VDBS (V)V 03217- DBS (V) 03217- Figure 4. Gain vs. VDBS Figure 7. Gain Error vs. VDBS at Various Frequencies 10202340 UNITS9MODE = LO158TOR10C7FA56TIONITSAN05–30.6 –30.5 –30.4 –30.3 –30.2 –30.1 –30.0 –29.9 –29.8 –29.7 –29.6 –29.5 –29.4 –29.3 –29.2 –29.1 –29.0LIC204OF UMODE = HILTIP%U15M3IN10GA2150 006 0 009 01234529.1 29.2 29.3 29.4 29.5 29.6 29.7 29.8 29.9 30.0 30.1 30.2 30.3 30.4 30.5 30.6VGAIN SCALING (mV/dB) 03217- MAG (V) 03217- Figure 5. Linear Gain Multiplication Factor vs. VMAG Figure 8. Gain Slope Histogram 1.060VDBS = 1.5V0.8501.2V400.60.9V300.40.6VB)20d0.2R (T = –40°CB)0.3V10OdR0RN (0VAI0N E –0.2GAIT = +85°C–10G –0.4–20T = +25°C–0.6–30–0.8–40–1.0–50 007 010 02.00.40.60.80.11.24.11 6.100k1M10M100M500MV 03217- DBS (V)FREQUENCY (Hz) 03217- Figure 6. Gain Linearity Error Normalized at 25°C vs. VDBS, Figure 9. Frequency Response in 10 dB Steps for Various Values of VDBS at Three Temperatures, f = 1 MHz Rev. G | Page 7 of 32 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Theory of Operation Circuit Description Overall Structure Normal Operating Conditions Linear-in-dB Gain Control (VDBS) Inversion of the Gain Slope Gain Magnitude Control (VMAG) Two Classes of Variable Gain Amplifiers Amplitude/Phase Response Noise, Input Capacity, and Dynamic Range Dynamic Range Input Common-Mode Range and Rejection Ratio Output Noise and Peak Swing Offset Compensation Effects of Loading on Gain and AC Response Gain Errors Due to On-Chip Resistor Tolerances Output (Input) Common-Mode Control Using the AD8330 Gain and Swing Adjustments When Loaded Input Coupling DC-Coupled Signal Path Using Single-Sided Sources and Loads Pulse Operation Preserving Absolute Gain Calculation of Noise Figure Noise as a Function of VDBS Distortion Considerations P1dB and V1dB Applications Information ADC Driving Simple AGC Amplifier Wide Range True RMS Voltmeter Evaluation Board General Description Basic Operation Options Measurement Setup AD8330-EVALZ Board Design Outline Dimensions Ordering Guide