link to page 5 link to page 5 link to page 5 link to page 5 link to page 5 link to page 5 link to page 5 link to page 5 link to page 5 link to page 5 link to page 5 link to page 6 link to page 5 link to page 6 link to page 5 link to page 5 link to page 5 link to page 5 link to page 5 link to page 5 link to page 6 link to page 5 link to page 5 link to page 6 link to page 6 STA8610A Data brief TeseoVI automotive quad-band RTK/PPP precise positioning FeaturesHighlights • AEC-Q100 automotive qualification on going • ESD: 2 kV (HBM) and 500 V (CDM) • Automotive grade 105°C GNSS features LFBGA100 8.5 × 8.5 × 1.4 mm 0.8 mm ball pich • STMicroelectronics' sixth generation positioning receiver with six constellations: GPS, Galileo, GLONASS, BeiDou, QZSS, NAVIC (former IRNSS) • Open platform supported by a software development kit (SDK) • Standard PVT positioning supporting up to quad-band for submeter accuracy applications • Measurement engine with up to quad-band to support precise positioning algorithms • Code phase, carrier phase, doppler frequency measurement • Support any SBAS systems • Independent GPS/QZSS L5, Galileo E5a/b, BeiDou B2a acquisition & tracking • 192 (96 data & 96 pilot) signal tracking channels Measurement engine core • Arm® Cortex®‑M7 • Embedded RAM/NVM/cache Product status link STA8610A Positioning engine core (RTK/PPP) • Arm® Cortex®‑M7 • Positioning engine core to support decimeter-level positioning firmware (RTK/PPP clients) Product summary • Open platform (SDK offer) for precise positioning software partners Order codePackingSecure • Operating frequency up to 314 MHz STA8610A No • Double precision floating-point unit Tray • Embedded cache (16 KB + 16 KB) STA8610AS1 Yes • Embedded 512 KB RAM STA8610ATR No Tape and reel External octo-SPI memory interface STA8610AS1TR Yes • Quad/octal flash/RAM controller • HyperBus™ flash/RAM controller Security • Cybersecurity (ISO21434) support (STA8610AS1 only) • Chip integrity (secure boot, secure firmware update, secure link) thanks to an embedded hardware security module (HSM), (STA8610AS1 only) • Signal integrity (antijamming/antispoofing) • Interface integrity (on-the-fly decryptor engine) (STA8610AS1 only) Communication interfaces • Three UART ports for host communication supporting hardware flow control • Two synchronous serial ports (SSP) for host communication or STA5635A RFIC programming • One I²C port for sensor interfacing DB5485 - Rev 1 - February 2025 www.st.com For further information, contact your local STMicroelectronics sales office. Document Outline STA8610A Features 1 Introduction 1.1 Description 1.2 Block diagram Revision history Glossary ADC AEC ASIL BeiDou CBC CDM DMA DRAW DRUM ESD Galileo GLONASS GNSS GPIO GPS HBM HSM HSSTP IRNSS ISO I²C JTAG LDO LEO LVDS MIPS NAVIC NVM OSNMA P2P PCB PPP PPS PVT QFN QZSS RAM RTK SBAS SDK SPI SPIQ SSP ST UART