Datasheet NE570 (ON Semiconductor) - 8
| Fabricante | ON Semiconductor |
| Descripción | Compandor |
| Páginas / Página | 11 / 8 — NE570. Figure 16. Control Signal Feedthrough. Figure 14. THD Trim … |
| Formato / tamaño de archivo | PDF / 176 Kb |
| Idioma del documento | Inglés |
NE570. Figure 16. Control Signal Feedthrough. Figure 14. THD Trim Network. OPERATIONAL AMPLIFIER
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NE570
this, which means our overall offsets are typically about mV. Control signal feedthrough is generated in the gain cell by The distortion is not affected by the magnitude of the gain imperfect device matching and mismatches in the current control current, and it does not increase as the gain is sources, I1 and I2. When no input signal is present, changing changed. This second harmonic distortion could be IG will cause a small output signal. The distortion trim is eliminated by making perfect transistors, but since that effective in nulling out any control signal feedthrough, but would be difficult, we have had to resort to other methods. in general, the null for minimum feedthrough will be A trim pin has been provided to allow trimming of the different than the null in distortion. The control signal internal offsets to zero, which effectively eliminated second feedthrough can be trimmed independently of distortion by harmonic distortion. Figure 14 shows the simple trim tying a current source to the DG input pin. This effectively network required. trims I1. Figure 16 shows such a trim network. VCC VCC R−SELECT FOR R 3.6 V 3.6 V 470 kW 6.2 kW 20 kW 100 kW TO PIN 3 OR 14 To THD Trim ≈200 pF
Figure 16. Control Signal Feedthrough Figure 14. THD Trim Network
Figure 15 shows the noise performance of the DG cell. The
OPERATIONAL AMPLIFIER
maximum output level before clipping occurs in the gain cell The main op amp shown in the chip block diagram is is plotted along with the output noise in a 20 kHz bandwidth. equivalent to a 741 with a 1.0 MHz bandwidth. Figure 17 Note that the noise drops as the gain is reduced for the first shows the basic circuit. Split collectors are used in the input 20 dB of gain reduction. At high gains, the signal to noise pair to reduce gM, so that a small compensation capacitor of ratio is 90 dB, and the total dynamic range from maximum just 10 pF may be used. The output stage, although capable signal to minimum noise is 110 dB. of output currents in excess of 20 mA, is biased for a low quiescent current to conserve power. When driving heavy +20 loads, this leads to a small amount of crossover distortion. 0 I1 I2 MAXIMUM −20 SIGNAL LEVEL Q6 D 90 dB 1 Q −IN 1 Q2 +IN OUT 110 dB D −40 2 CC OUTPUT (dBm) −60 Q5 Q4 −80 Q3 NOISE IN 20 kHz BW −100
Figure 17. Operational Amplifier
−40 −20 0 VCA GAIN (dB)
Figure 15. Dynamic Range http://onsemi.com 8
NE570
this, which means our overall offsets are typically about mV. Control signal feedthrough is generated in the gain cell by The distortion is not affected by the magnitude of the gain imperfect device matching and mismatches in the current control current, and it does not increase as the gain is sources, I1 and I2. When no input signal is present, changing changed. This second harmonic distortion could be IG will cause a small output signal. The distortion trim is eliminated by making perfect transistors, but since that effective in nulling out any control signal feedthrough, but would be difficult, we have had to resort to other methods. in general, the null for minimum feedthrough will be A trim pin has been provided to allow trimming of the different than the null in distortion. The control signal internal offsets to zero, which effectively eliminated second feedthrough can be trimmed independently of distortion by harmonic distortion. Figure 14 shows the simple trim tying a current source to the DG input pin. This effectively network required. trims I1. Figure 16 shows such a trim network. VCC VCC R−SELECT FOR R 3.6 V 3.6 V 470 kW 6.2 kW 20 kW 100 kW TO PIN 3 OR 14 To THD Trim ≈200 pF
Figure 16. Control Signal Feedthrough Figure 14. THD Trim Network
Figure 15 shows the noise performance of the DG cell. The
OPERATIONAL AMPLIFIER
maximum output level before clipping occurs in the gain cell The main op amp shown in the chip block diagram is is plotted along with the output noise in a 20 kHz bandwidth. equivalent to a 741 with a 1.0 MHz bandwidth. Figure 17 Note that the noise drops as the gain is reduced for the first shows the basic circuit. Split collectors are used in the input 20 dB of gain reduction. At high gains, the signal to noise pair to reduce gM, so that a small compensation capacitor of ratio is 90 dB, and the total dynamic range from maximum just 10 pF may be used. The output stage, although capable signal to minimum noise is 110 dB. of output currents in excess of 20 mA, is biased for a low quiescent current to conserve power. When driving heavy +20 loads, this leads to a small amount of crossover distortion. 0 I1 I2 MAXIMUM −20 SIGNAL LEVEL Q6 D 90 dB 1 Q −IN 1 Q2 +IN OUT 110 dB D −40 2 CC OUTPUT (dBm) −60 Q5 Q4 −80 Q3 NOISE IN 20 kHz BW −100
Figure 17. Operational Amplifier
−40 −20 0 VCA GAIN (dB)
Figure 15. Dynamic Range http://onsemi.com 8