Datasheet SY58608U (Microchip) - 2
| Fabricante | Microchip |
| Descripción | 2.5V, high-speed, fully differential 1:2 LVDS fanout buffer optimized to provide two identical output copies with less than 20ps of skew and less than 10psPP total jitter |
| Páginas / Página | 24 / 2 — SY58608U. Functional Block Diagram |
| Formato / tamaño de archivo | PDF / 2.7 Mb |
| Idioma del documento | Inglés |
SY58608U. Functional Block Diagram
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SY58608U Functional Block Diagram
Q0 IN /Q0 50ȍ VT 50ȍ /IN Q1 /Q1 VREF-AC DS20005605A-page 2 2018 Microchip Technology Inc. Document Outline 1.0 Electrical Characteristics 2.0 Functional Description 2.1 Fail-Safe Input (FSI) 2.2 Input Clock Failure Case 3.0 Timing Diagrams 4.0 Typical Performance Curves 5.0 Additive Phase Noise Plot 6.0 Input Stage 7.0 Input Interface Applications 8.0 Pin Descriptions 9.0 Packaging Information 9.1 Package Marking Information Appendix A: Revision History Product Identification System Worldwide Sales and Service
Q0 IN /Q0 50ȍ VT 50ȍ /IN Q1 /Q1 VREF-AC DS20005605A-page 2 2018 Microchip Technology Inc. Document Outline 1.0 Electrical Characteristics 2.0 Functional Description 2.1 Fail-Safe Input (FSI) 2.2 Input Clock Failure Case 3.0 Timing Diagrams 4.0 Typical Performance Curves 5.0 Additive Phase Noise Plot 6.0 Input Stage 7.0 Input Interface Applications 8.0 Pin Descriptions 9.0 Packaging Information 9.1 Package Marking Information Appendix A: Revision History Product Identification System Worldwide Sales and Service