Datasheet AT89S53 (Microchip) - 3

AT89S53 Block Diagram
P0.0 - P0.7 P2.0 - P2.7 VCC PORT 0 DRIVERS PORT 2 DRIVERS GND RAM ADDR. PORT 0 PORT 2 RAM REGISTER LATCH LATCH FLASH PROGRAM B STACK ADDRESS REGISTER ACC POINTER REGISTER BUFFER TMP2 TMP1 PC ALU INCREMENTER INTERRUPT, SERIAL PORT, AND TIMER BLOCKS PROGRAM COUNTER PSW PSEN TIMING ALE/PROG INSTRUCTION AND DPTR REGISTER EA / V CONTROL PP RST WATCH PORT 3 PORT 1 SPI PROGRAM DOG LATCH LATCH PORT LOGIC OSC PORT 3 DRIVERS PORT 1 DRIVERS P3.0 - P3.7 P1.0 - P1.7
3
0787E–MICRO–3/06 Document Outline Block Diagram Instruction Set Features Description Pin Description VCC GND Port 0 Port 1 Pin Description Port 2 Port 3 RST ALE/PROG PSEN EA/VPP XTAL1 XTAL2 Special Function Registers Data Memory - RAM Programmable Watchdog Timer Timer 0 and 1 Timer 2 Capture Mode Auto-reload (Up or Down Counter) Baud Rate Generator Programmable Clock Out UART Serial Peripheral Interface Interrupts Oscillator Characteristics Idle Mode Status of External Pins During Idle and Power-down Modes Power-down Mode Program Memory Lock Bits Lock Bit Protection Modes(1)(2) Programming the Flash Programming Interface Serial Downloading Either an external system clock is supplied at pin XTAL1 or a crystal needs to be connected across pins XTAL1 and XTAL2. The max... Serial Programming Algorithm Serial Programming Instruction Flash Parallel Programming Modes Flash Programming and Verification Characteristics - Parallel Mode Flash Programming and Verification Waveforms - Parallel Mode Serial Downloading Waveforms Absolute Maximum Ratings* DC Characteristics AC Characteristics External Program and Data Memory Characteristics External Program Memory Read Cycle External Data Memory Read Cycle External Data Memory Write Cycle External Clock Drive Waveforms External Clock Drive Serial Port Timing: Shift Register Mode Test Conditions Shift Register Mode Timing Waveforms AC Testing Input/Output Waveforms(1) Float Waveforms(1) Ordering Information Pin Configurations