Datasheet NCP565, NCV565 (ON Semiconductor) - 7

FabricanteON Semiconductor
DescripciónLinear Regulator -Low Dropout 1.5 A
Páginas / Página17 / 7 — NCP565, NCV565. TYPICAL CHARACTERISTICS. Figure 17. Noise Density vs. …
Formato / tamaño de archivoPDF / 428 Kb
Idioma del documentoInglés

NCP565, NCV565. TYPICAL CHARACTERISTICS. Figure 17. Noise Density vs. Frequency. Figure 18. Noise Density vs. Frequency

NCP565, NCV565 TYPICAL CHARACTERISTICS Figure 17 Noise Density vs Frequency Figure 18 Noise Density vs Frequency

Línea de modelo para esta hoja de datos

Versión de texto del documento

link to page 2 link to page 6 link to page 6 link to page 8 link to page 6 link to page 6
NCP565, NCV565 TYPICAL CHARACTERISTICS
100 100 90 90 ) 80 80 /ǰHz /ǰHz s 70 s 70 rm rm 60 60 Vin = 3.0 V V 50 Vin = 3.0 V 50 out = 0.9 V V Iout = 1.5 A 40 out = 0.9 V 40 Iout = 10 mA 30 30 20 20 NOISE DENSITY (nV NOISE DENSITY (nV 10 10 0 0 Start 1.0 kHz Stop 100 kHz Start 1.0 kHz Stop 100 kHz FREQUENCY (kHz) FREQUENCY (kHz)
Figure 17. Noise Density vs. Frequency Figure 18. Noise Density vs. Frequency
NOTE: Typical characteristics were measured with the same conditions as electrical characteristics.
APPLICATION INFORMATION
The NCP565 low dropout linear regulator provides
Adjustable Operation
adjustable voltages at currents up to 1.5 A. It features ultra The typical application circuit for the adjustable output fast transient response and low dropout voltage. These regulators is shown in Figure 2. The adjustable device devices contain output current limiting, short circuit develops and maintains the nominal 0.9 V reference voltage protection and thermal shutdown protection. between Adj and ground pins. A resistor divider network R1 and R2 causes a fixed current to flow to ground. This current
Input, Output Capacitor and Stability
creates a voltage across R1 that adds to the 0.9 V across R2 An input bypass capacitor is recommended to improve and sets the overall output voltage. transient response or if the regulator is located more than a The output voltage is set according to the formula: few inches from the power source. This will reduce the circuit’s sensitivity to the input line impedance at high Vout + Vref ǒR1 ) R2Ǔ R2 * IAdj R2 frequencies and significantly enhance the output transient response. Different types and different sizes of input The adjust pin current, IAdj, is typically 30 nA and capacitors can be chosen dependent on the quality of power normally much lower than the current flowing through R1 supply. A 150 mF OSCON 16SA150M type from Sanyo and R2, thus it generates a small output voltage error that can should be adequate for most applications. The bypass usually be ignored. capacitor should be mounted with shortest possible lead or
Load Transient Measurement
track length directly across the regulator’s input terminals. Large load current changes are always presented in The output capacitor is required for stability. The NCP565 microprocessor applications. Therefore good load transient remains stable with ceramic, tantalum, and aluminum− performance is required for the power stage. NCP565 has electrolytic capacitors with a minimum value of 1.0 mF with the feature of ultra fast transient response. Its load transient ESR between 50 mW and 2.5 W. The NCP565 is optimized responses in Figures 13 through 16 are tested on evaluation for use with a 150 mF OSCON 16SA150M type in parallel board shown in Figure 19. On the evaluation board, it with a 10 mF OSCON 10SL10M type from Sanyo. The consists of NCP565 regulator circuit with decoupling and 10 mF capacitor is used for best AC stability while 150 mF filter capacitors and the pulse controlled current sink to capacitor is used for achieving excellent output transient obtain load current transitions. The load current transitions response. The output capacitors should be placed as close as are measured by current probe. Because the signal from possible to the output pin of the device. If not, the excellent current probe has some time delay, it causes load transient response of NCP565 will be degraded. un−synchronization between the load current transition and output voltage response, which is shown in Figures 13 through 16.
www.onsemi.com 7