Datasheet TMUX4051, TMUX4052, TMUX4053 (Texas Instruments) - 8

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TMUX4051 , TMUX4052 , TMUX4053
SCDS445B – MAY 2022 – REVISED MARCH 2023
www.ti.com 7.3 Thermal Information: TMUX405x TMUX4051 / TMUX4052 / TMUX4053 THERMAL METRIC
(1)
PW (TSSOP) DYY (SOT) BQB (WQFN) UNIT 16 PINS 16 PINS 16 PINS
RθJA Junction-to-ambient thermal resistance 116.5 138.9 70.5 °C/W RθJC(top) Junction-to-case (top) thermal resistance 47.2 70.3 67.8 °C/W RθJB Junction-to-board thermal resistance 63.0 69.1 40.2 °C/W ΨJT Junction-to-top characterization parameter 6.4 5.1 3.9 °C/W ΨJB Junction-to-board characterization parameter 62.1 69.0 40.2 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A 18.7 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
7.4 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VDD – VSS (1) Power supply voltage differential 5 24 V VDD Positive power supply voltage 5 24 V VSS Negative power supply voltage –15 0 V VS or VD Signal path input/output voltage (source or drain pin) (Sx, D) VSS VDD V VAx or VEN Address or enable pin voltage 0 VDD V IS or ID (CONT) Source or drain continuous current (Sx, D) –10 10 mA TA Ambient temperature –55 125 °C (1) VDD and VSS can be any value as long as 5 V ≤ (VDD – VSS) ≤ 24 V, and the minimum VDD and VSS are met. 8 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: TMUX4051 TMUX4052 TMUX4053 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Device Comparison Table 6 Pin Configuration and Functions 7 Specifications 7.1 Absolute Maximum Ratings 7.2 ESD Ratings 7.3 Thermal Information: TMUX405x 7.4 Recommended Operating Conditions 7.5 Electrical Characteristics 7.6 AC Performance Characteristics 7.7 Timing Characteristics 7.8 Typical Characteristics 8 Parameter Measurement Information 8.1 On-Resistance 8.2 Off-Leakage Current 8.3 On-Leakage Current 8.4 Transition Time 8.5 Break-Before-Make 8.6 tON(EN) and tOFF(EN) 8.7 Propagation Delay 8.8 Charge Injection 8.9 Off Isolation 8.10 Crosstalk 8.11 Bandwidth 9 Detailed Description 9.1 Overview 9.2 Functional Block Diagram 9.3 Feature Description 9.3.1 Bidirectional Operation 9.3.2 Rail-to-Rail Operation 9.3.3 1.8 V Logic Compatible Inputs 9.3.4 Device Functional Modes 9.3.5 Truth Tables 10 Application and Implementation 10.1 Application Information 10.2 Typical Application 10.3 Design Requirements 10.4 Detailed Design Procedure 10.5 Application Curves 10.6 Power Supply Recommendations 10.7 Layout 10.7.1 Layout Guidelines 10.7.2 Layout Example 11 Device and Documentation Support 11.1 Documentation Support 11.1.1 Related Documentation 11.2 Receiving Notification of Documentation Updates 11.3 Support Resources 11.4 Trademarks 11.5 Electrostatic Discharge Caution 11.6 Glossary 12 Mechanical, Packaging, and Orderable Information Sheets and Views 4224642(B)-02_PKG_OUTLINE 4224642(B)-03_BOARD_LAYOUT 4224642(B)-04_STENCIL Sheets and Views 4224640-02_PKG_OULINE 4224640-03_BOARD_LAYOUT 4224640-04_STENCIL