Datasheet TMUX4051, TMUX4052, TMUX4053 (Texas Instruments) - 10

TMUX4051 , TMUX4052 , TMUX4053
SCDS445B – MAY 2022 – REVISED MARCH 2023
www.ti.com 7.5 Electrical Characteristics (continued)
Over operating free-air temperature range, Typical at TA = 25℃ (unless otherwise noted)
PARAMETER TEST CONDITIONS VDD VSS TA MIN TYP MAX UNIT ANALOG SWITCH
–55°C 800 V 25°C 75 1050 S = VSS to VDD 5 V 0 V ID = –1 mA 85°C 1200 125°C 1300 –55°C 310 V 25°C 60 400 S = VSS to VDD 10 V 0 V ID = –1 mA 85°C 520 125°C 550 –55°C 200 RON V 25°C 60 240 Source to Drain ON- S = VSS to VDD 24 V 0 V Ω I Resistance D = –1 mA 85°C 300 125°C 300 –55°C 310 V 25°C 60 400 S = VSS to VDD 5 V –5 V ID = –1 mA 85°C 520 125°C 550 –55°C 200 V 25°C 60 240 S = VSS to VDD 12 V –12 V ID = –1 mA 85°C 300 125°C 300 V ΔR S = VSS to VDD ON All 25°C 2 Ω ID = –1 mA 25°C 60 V R S = VSS to VDD ON FLAT All –55°C to 85°C 150 Ω ID = –1 mA –55°C to 125°C 150 Switch State is off 25°C ±0.3 ±100 IS(OFF) V 24 V 0 V –55°C to 85°C ±800 nA I S = VSS / VDD D(OFF) VD = VDD / VSS –55°C to 125°C ±1000 25°C ±0.3 ±100 Switch State is on ION 24 V 0 V –55°C to 85°C ±800 nA VS = VD = VSS or VDD –55°C to 125°C ±1000
LOGIC INPUTS (ADDRESS / ENABLE pins)
VIH Input High Voltage All –55°C to 125°C 1.35 VDD V VIL Input Low Voltage All –55°C to 125°C 0 0.8 V IIH 25°C ±0.6 IIL VLOGIC = 0 V, 5 V, or VDD All µA Logic Input Current –55°C to 125°C –1 1 CIN All 25°C 2 pF 10 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: TMUX4051 TMUX4052 TMUX4053 Document Outline 1 Features 2 Applications 3 Description Table of Contents 4 Revision History 5 Device Comparison Table 6 Pin Configuration and Functions 7 Specifications 7.1 Absolute Maximum Ratings 7.2 ESD Ratings 7.3 Thermal Information: TMUX405x 7.4 Recommended Operating Conditions 7.5 Electrical Characteristics 7.6 AC Performance Characteristics 7.7 Timing Characteristics 7.8 Typical Characteristics 8 Parameter Measurement Information 8.1 On-Resistance 8.2 Off-Leakage Current 8.3 On-Leakage Current 8.4 Transition Time 8.5 Break-Before-Make 8.6 tON(EN) and tOFF(EN) 8.7 Propagation Delay 8.8 Charge Injection 8.9 Off Isolation 8.10 Crosstalk 8.11 Bandwidth 9 Detailed Description 9.1 Overview 9.2 Functional Block Diagram 9.3 Feature Description 9.3.1 Bidirectional Operation 9.3.2 Rail-to-Rail Operation 9.3.3 1.8 V Logic Compatible Inputs 9.3.4 Device Functional Modes 9.3.5 Truth Tables 10 Application and Implementation 10.1 Application Information 10.2 Typical Application 10.3 Design Requirements 10.4 Detailed Design Procedure 10.5 Application Curves 10.6 Power Supply Recommendations 10.7 Layout 10.7.1 Layout Guidelines 10.7.2 Layout Example 11 Device and Documentation Support 11.1 Documentation Support 11.1.1 Related Documentation 11.2 Receiving Notification of Documentation Updates 11.3 Support Resources 11.4 Trademarks 11.5 Electrostatic Discharge Caution 11.6 Glossary 12 Mechanical, Packaging, and Orderable Information Sheets and Views 4224642(B)-02_PKG_OUTLINE 4224642(B)-03_BOARD_LAYOUT 4224642(B)-04_STENCIL Sheets and Views 4224640-02_PKG_OULINE 4224640-03_BOARD_LAYOUT 4224640-04_STENCIL