Datasheet AD9696, AD9698 (Analog Devices)

a
Ultrafast TTL Comparators AD9696/AD9698 FEATURES
Both devices allow the use of either a single +5 V supply or
4.5 ns Propagation Delay
±5 V supplies. The choice of supplies determines the common
200 ps Maximum Propagation Delay Dispersion
mode input voltage range available: –2.2 V to +3.7 V for ± 5 V
Single +5 V or
6
5 V Supply Operation
operation, +1.4 V to +3.7 V for single +5 V supply operation.
Complementary Matched TTL Outputs
The differential input stage features high precision, with offset
APPLICATIONS
voltages that are less than 2 mV and offset currents less than
High Speed Line Receivers
1 µA. A latch enable input is provided to allow operation in ei-
Peak Detectors
ther sample-and-hold or track-and-hold applications.
Window Comparators
The AD9696 and AD9698 are both available as commercial
High Speed Triggers
temperature range devices operating from ambient temperatures
Ultrafast Pulse Width Discriminators
of 0°C to +70°C, and as extended temperature range devices for ambient temperatures from –55°C to +125°C. Both versions are available qualified to MIL-STD-883 class B. Package options for the AD9696 include a 10-pin TO-100 metal
GENERAL DESCRIPTION
can, an 8-pin ceramic DIP, an 8-pin plastic DIP, and an 8-lead The AD9696 and AD9698 are ultrafast TTL-compatible volt- small outline plastic package. The AD9698 is available in a age comparators able to achieve propagation delays previously 16-pin ceramic DIP, a 16-lead ceramic gullwing, a 16-pin plastic possible only in high performance ECL devices. The AD9696 is DIP and a 16-lead small outline plastic package. Military quali- a single comparator providing 4.5 ns propagation delay, 200 ps fied versions of the AD9696 come in the TO-100 can and maximum delay dispersion and 1.7 ns setup time. The AD9698 ceramic DIP; the dual AD9698 comes in ceramic DIP. is a dual comparator with equally high performance; both de- vices are ideal for critical timing circuits in such applications as ATE, communications receivers and test instruments.
FUNCTIONAL BLOCK DIAGRAM AD9696 AD9696/AD9698 Architecture NONINVERTING Q OUTPUT INPUT INVERTING Q OUTPUT LEVEL INPUT INPUT LATCH GAIN OUTPUT SHIFT LATCH ENABLE AD9698 NONINVERTING Q OUTPUT NONINVERTING Q OUTPUT INPUT #1 #2 INPUT INVERTING Q OUTPUT INVERTING Q OUTPUT INPUT INPUT LATCH LATCH ENABLE ENABLE
REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
which may result from its use. No license is granted by implication or
Tel: 617/329-4700 World Wide Web Site: http://www.analog.com
otherwise under any patent or patent rights of Analog Devices.
Fax: 617/326-8703 © Analog Devices, Inc., 1997