Datasheet ADG431, ADG432, ADG433 (Analog Devices) - 2

ADG431/ADG432/ADG433–SPECIFICATIONS1 Dual Supply (VDD = +15 V 10%, VSS = –15 V 10%, VL = +5 V 10%, GND = O V, unless otherwise noted.) B Version –40 C to Parameter +25 C +85 C Unit Test Conditions/Comments
ANALOG SWITCH Analog Signal Range VDD to VSS V RON 17 Ω typ VD = ± 8.5 V, IS = –10 mA; 24 26 Ω max VDD = +13.5 V, VSS = –13.5 V RON vs. VD (VS) 15 % typ RON Drift 0.5 %/°C typ RON Match 5 % typ VD = 0 V, IS = –10 mA LEAKAGE CURRENTS VDD = +16.5 V, VSS = –16.5 V Source OFF Leakage IS (OFF) ±0.05 nA typ VD = ± 15.5 V, VS = ⫿15.5 V; ±0.25 ±2 nA max Test Circuit 2 Drain OFF Leakage ID (OFF) ±0.05 nA typ VD = ± 15.5 V, VS = ⫿15.5 V; ±0.25 ±2 nA max Test Circuit 2 Channel ON Leakage ID, IS (ON) ±0.1 nA typ VD = VS = ± 15.5 V; ±0.35 ±3 nA max Test Circuit 3 DIGITAL INPUTS Input High Voltage, VINH 2.4 V min Input Low Voltage, VINL 0.8 V max Input Current IINL or IINH 0.005 µA typ VIN = VINL or VINH ±0.02 µA max CIN Digital Input Capacitance 9 pF typ DYNAMIC CHARACTERISTICS1 VDD = +15 V, VSS = –15 V tON 90 ns typ RL = 300 Ω, CL = 35 pF; 165 ns max VS = ± 10 V; Test Circuit 4 tOFF 60 ns typ RL = 300 Ω, CL = 35 pF; 130 ns max VS = ± 10 V; Test Circuit 4 Break-Before-Make Time Delay, tD 25 ns typ RL = 300 Ω, CL = 35 pF; (ADG433 Only) VS1 = VS2 = +10 V; Test Circuit 5 Charge Injection 5 pC typ VS = 0 V, RS = 0 Ω, CL = 10 nF; Test Circuit 6 OFF Isolation 68 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; Test Circuit 7 Channel-to-Channel Crosstalk 85 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; Test Circuit 8 CS (OFF) 9 pF typ f = 1 MHz CD (OFF) 9 pF typ f = 1 MHz CD, CS (ON) 35 pF typ f = 1 MHz POWER REQUIREMENTS VDD = +16.5 V, VSS = –16.5 V Digital Inputs = 0 V or 5 V IDD 0.0001 µA typ 0.1 0.2 µA max ISS 0.0001 µA typ 0.1 0.2 µA max IL 0.0001 µA typ 0.1 0.2 µA max Power Dissipation 7.7 µW max NOTES 1Guaranteed by design, not subject to production test. Specifications subject to change without notice. –2– REV. C