Datasheet ADG786, ADG788 (Analog Devices) - 2

ADG786/ADG788–SPECIFICATIONS1(VDD = 5 V 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.) B Version –40 C Parameter +25 C to +85 C Unit Test Conditions/Comments
ANALOG SWITCH Analog Signal Range 0 V to VDD V On Resistance (RON) 2.5 Ω typ VS = 0 V to VDD, IDS = 10 mA; 4.5 5.0 Ω max Test Circuit 1 On-Resistance Match between 0.1 Ω typ VS = 0 V to VDD, IDS = 10 mA Channels (ΔRON) 0.4 Ω max On-Resistance Flatness (RFLAT(ON)) 0.5 Ω typ VS = 0 V to VDD, IDS = 10 mA 1.2 Ω max LEAKAGE CURRENTS VDD = 5.5 V Source OFF Leakage IS (OFF) ±0.01 nA typ VD = 4.5 V/1 V, VS = 1 V/4.5 V; ±0.1 ±0.3 nA max Test Circuit 2 Channel ON Leakage ID, IS (ON) ±0.01 nA typ VD = VS = 1 V, or 4.5 V; ±0.1 ±0.5 nA max Test Circuit 3 DIGITAL INPUTS Input High Voltage, VINH 2.4 V min Input Low Voltage, VINL 0.8 V max Input Current IINL or IINH 0.005 μA typ VIN = VINL or VINH ±0.1 μA max CIN, Digital Input Capacitance 4 pF typ DYNAMIC CHARACTERISTICS2 tON 19 ns typ RL = 300 Ω, CL = 35 pF; 34 ns max VS1A = 3 V, VS1B = 0 V, Test Circuit 4 tOFF 7 ns typ RL = 300 Ω, CL = 35 pF; 12 ns max VS = 3 V, Test Circuit 4 ADG786 tON(EN) 20 ns typ RL = 300 Ω, CL = 35 pF; 40 ns max VS = 3 V, Test Circuit 5 tOFF(EN) 7 ns typ RL = 300 Ω, CL = 35 pF; 12 ns max VS = 3 V, Test Circuit 5 Break-Before-Make Time Delay, tD 13 ns typ RL = 300 Ω, CL = 35 pF; 1 ns min VS = 3 V, Test Circuit 6 Charge Injection ±3 pC typ VS = 2 V, RS = 0 Ω, CL = 1 nF; Test Circuit 7 Off Isolation –80 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; Test Circuit 8 Channel-to-Channel Crosstalk –80 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; Test Circuit 9 –3 dB Bandwidth 160 MHz typ RL = 50 Ω, CL = 5 pF, Test Circuit 10 CS (OFF) 11 pF typ f = 1 MHz CD, CS (ON) 34 pF typ f = 1 MHz POWER REQUIREMENTS VDD = 5.5 V IDD 0.001 μA typ Digital Inputs = 0 V or 5.5 V 1.0 μA max NOTES 1Temperature range is as follows: B Version: –40°C to +85°C. 2Guaranteed by design, not subject to production test. Specifications subject to change without notice. –2– REV. $