Datasheet ADG1233, ADG1234 (Analog Devices) - 9
| Fabricante | Analog Devices |
| Descripción | Low Capacitance, Triple/Quad SPDT ±15 V/+12 V iCMOS Switches |
| Páginas / Página | 17 / 9 — Data Sheet. ADG1233/ADG1234. N1I. 15 D4. 12 EN. S1B 2. 14 S4B. S1B. 11 V. … |
| Revisión | D |
| Formato / tamaño de archivo | PDF / 450 Kb |
| Idioma del documento | Inglés |
Data Sheet. ADG1233/ADG1234. N1I. 15 D4. 12 EN. S1B 2. 14 S4B. S1B. 11 V. ADG1234. ADG1233. VSS 3. 13 VDD. TOP VIEW. S2B. 10 S3B. GND 4. (Not to Scale)
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Data Sheet ADG1233/ADG1234 1A DD ND 1A N1 N4 4A S V G N1I S I EN I S 20 19 18 17 16 16 15 14 13 D1 1 15 D4 1 D1 12 EN S1B 2 14 S4B S1B 2 11 V ADG1234 SS ADG1233 VSS 3 13 VDD TOP VIEW S2B 3 TOP VIEW 10 S3B GND 4 (Not to Scale) 12 S3B (Not to Scale) 5 D2 4 9 D3 S2B 11 D3 5 6 7 8 6 7 8 9 10 2A N2 N3 3A D2 2A N2I N3 3A I S I I S S S NOTES NOTES 1. NC = NO CONNECT. DO NOT CONNECT
005
1. THE EXPOSED PAD MUST BE TIED TO THIS PIN. TO SUBSTRATE, VSS.
004
2. THE EXPOSED PAD MUST BE TIED
05743-
TO SUBSTRATE, VSS.
05743- Figure 5. 16-Lead, 4 mm × 4 mm LFCSP Pin Configuration, Figure 6. 20-Lead, 4 mm × 4 mm LFCSP Pin Configuration, Exposed Pad Tied to Substrate, VSS Exposed Pad Tied to Substrate, VSS
Table 5. 16-Lead LFCSP/20-Lead LFCSP Pin Configurations Pin No. ADG1233 1 6-Lead LFCSP Pin No. ADG1234 20-Lead LFCSP Mnemonic
1 1 D1 2 2 S1B 3 5 S2B 4 6 D2 5 7 S2A 6 8 IN2 7 9 IN3 8 10 S3A 9 11 D3 10 12 S3B 11 3 VSS 12 18 EN 13 19 IN1 14 4 GND 15 13 VDD 16 20 S1A Not applicable 14 S4B Not applicable 15 D4 Not applicable 16 S4A Not applicable 17 IN4
Table 6. ADG1233/ ADG1234 T ruth Table EN INx Switch xA Switch xB
1 X Off Off 0 0 Off On 0 1 On Off Rev. D | Page 9 of 17 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAMS GENERAL DESCRIPTION PRODUCT HIGHLIGHTS REVISION HISTORY SPECIFICATIONS DUAL SUPPLY SINGLE SUPPLY ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE
005
1. THE EXPOSED PAD MUST BE TIED TO THIS PIN. TO SUBSTRATE, VSS.
004
2. THE EXPOSED PAD MUST BE TIED
05743-
TO SUBSTRATE, VSS.
05743- Figure 5. 16-Lead, 4 mm × 4 mm LFCSP Pin Configuration, Figure 6. 20-Lead, 4 mm × 4 mm LFCSP Pin Configuration, Exposed Pad Tied to Substrate, VSS Exposed Pad Tied to Substrate, VSS
Table 5. 16-Lead LFCSP/20-Lead LFCSP Pin Configurations Pin No. ADG1233 1 6-Lead LFCSP Pin No. ADG1234 20-Lead LFCSP Mnemonic
1 1 D1 2 2 S1B 3 5 S2B 4 6 D2 5 7 S2A 6 8 IN2 7 9 IN3 8 10 S3A 9 11 D3 10 12 S3B 11 3 VSS 12 18 EN 13 19 IN1 14 4 GND 15 13 VDD 16 20 S1A Not applicable 14 S4B Not applicable 15 D4 Not applicable 16 S4A Not applicable 17 IN4
Table 6. ADG1233/ ADG1234 T ruth Table EN INx Switch xA Switch xB
1 X Off Off 0 0 Off On 0 1 On Off Rev. D | Page 9 of 17 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAMS GENERAL DESCRIPTION PRODUCT HIGHLIGHTS REVISION HISTORY SPECIFICATIONS DUAL SUPPLY SINGLE SUPPLY ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE