link to page 9 link to page 9 link to page 9 ADG5204PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONSN01CEAANA0 114 A165431111EN 213 GNDV3SSADG5204 12 VDDV1SS12 GNDS1 411TOP VIEWS3NC 2ADG520411 VDD(Not to Scale)S2 510 S4S1 3TOP VIEW10 S3(Not to Scale)D 69NCS2 49 S4NC 78NC 02 5678 0 8- NC = NO CONNECT 76 CDCC 09 NNNNOTES 03 1. NC = NO CONNECT. 0 8- 2. EXPOSED PAD TIED TO SUBSTRATE, VSS. 76 09 Figure 2. TSSOP Pin Configuration Figure 3. LFCSP Pin Configuration Table 7. Pin Function DescriptionsPin No.TSSOP LFCSPMnemonic Description 1 15 A0 Logic Control Input. 2 16 EN Active High Digital Input. When this pin is low, the device is disabled and all switches are off. When this pin is high, the Ax logic inputs determine the on switches. 3 1 VSS Most Negative Power Supply Potential. 4 3 S1 Source Terminal. Can be an input or an output. 5 4 S2 Source Terminal. Can be an input or an output. 6 6 D Drain Terminal. Can be an input or an output. 7 to 9 2, 5, 7, 8, 13 NC No Connect. These pins are open. 10 9 S4 Source Terminal. Can be an input or an output. 11 10 S3 Source Terminal. Can be an input or an output. 12 11 VDD Most Positive Power Supply Potential. 13 12 GND Ground (0 V) Reference. 14 14 A1 Logic Control Input. N/A1 EP Exposed Pad Exposed Pad. The exposed pad is connected internally. For increased reliability of the solder joints and maximum thermal capability, it is recommended that the pad be soldered to the substrate, VSS. 1 N/A means not applicable. TRUTH TABLETable 8. EN A1A0 S1 S2 S3 S4 0 X1 X1 Off Off Off Off 1 0 0 On Off Off Off 1 0 1 Off On Off Off 1 1 0 Off Off On Off 1 1 1 Off Off Off On 1 X is don’t care. Rev. A | Page 9 of 20 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ±15 V DUAL SUPPLY ±20 V DUAL SUPPLY 12 V SINGLE SUPPLY 36 V SINGLE SUPPLY CONTINUOUS CURRENT PER CHANNEL, Sx OR D ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TRUTH TABLE TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY TRENCH ISOLATION APPLICATIONS INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE