Datasheet ADG5204 (Analog Devices)

High Voltage, Latch-Up Proof, 4-Channel Multiplexer ADG5204 FEATURES FUNCTIONAL BLOCK DIAGRAM Latch-up proof ADG5204 3 pF off source capacitance S1 26 pF off drain capacitance S2 −0.6 pC charge injection D S3 Low leakage: 0.4 nA maximum at 85°C S4 ±9 V to ±22 V dual-supply operation 1 OF 4 9 V to 40 V single-supply operation DECODERS
1
48 V supply maximum ratings
00 8-
A0 A1 EN
76
Fully specified at ±15 V, ±20 V, +12 V, and +36 V
09 Figure 1.
VSS to VDD analog signal range APPLICATIONS Automatic test equipment Data acquisition Instrumentation Avionics Audio and video switching Communication systems GENERAL DESCRIPTION PRODUCT HIGHLIGHTS
The ADG5204 is a complementary metal oxide semiconductor 1. Trench Isolation Guards Against Latch-Up. (CMOS) analog multiplexer, comprising four single channels. A dielectric trench separates the P and N channel transistors, The ultralow capacitance and charge injection of these switches thereby preventing latch-up even under severe overvoltage make them ideal solutions for data acquisition and sample-and- conditions. hold applications, where low glitch and fast settling are required. 2. Ultralow Capacitance and <1 pC Charge Injection. Fast switching speed together with high signal bandwidth make 3. Dual-Supply Operation. the ADG5204 suitable for video signal switching. For applications where the analog signal is bipolar, the ADG5204 can be operated from dual supplies up to ±22 V. The ADG5204 is designed on a trench process, which guards 4. Single-Supply Operation. against latch-up. A dielectric trench separates the P and N For applications where the analog signal is unipolar, the channel transistors, thereby preventing latch-up even under ADG5204 can be operated from a single rail power supply severe overvoltage conditions. up to 40 V. The ADG5204 switches one of four inputs to a common 5. 3 V Logic-Compatible Digital Inputs. output, D, as determined by the 3-bit binary address lines, A0, VINH = 2.0 V, VINL = 0.8 V. A1, and EN. Logic 0 on the EN pin disables the device. Each 6. No VL Logic Power Supply Required. switch conducts equally well in both directions when on, and each switch has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked. All switches exhibit break-before-make switching action.
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Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ±15 V DUAL SUPPLY ±20 V DUAL SUPPLY 12 V SINGLE SUPPLY 36 V SINGLE SUPPLY CONTINUOUS CURRENT PER CHANNEL, Sx OR D ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TRUTH TABLE TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY TRENCH ISOLATION APPLICATIONS INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE