Datasheet ADGS1612 (Analog Devices)

SPI Interface, 1 Ω RON, ±5 V, 12 V, 5 V, 3.3 V, Mux Configurable, Quad SPST Switch Data Sheet ADGS1612 FEATURES FUNCTIONAL BLOCK DIAGRAM SPI interface with error detection ADGS1612 Includes CRC, invalid read/write address, and SCLK count error detection S1 D1 Supports burst mode and daisy-chain mode Industry-standard SPI Mode 0 and SPI Mode 3 interface S2 D2 compatible Guaranteed break-before-make switching allowing external S3 D3 wiring of switches to deliver multiplexer configurations S4 D4 1 Ω typical on resistance at 25°C 0.23 Ω typical on resistance flatness at 25°C VSS to VDD analog signal range SPI SDO Fully specified at ±5 V, 12 V, 5 V, and 3.3 V INTERFACE ±3.3 V to ±8 V dual-supply operation
1 0 0
3.3 V to 16 V single-supply operation
4-
SCLK SDI CS RESET/VL
605
1.8 V logic compatibility with 2.7 V ≤ V
1
L ≤ 3.3 V
Figure 1.
4 mm × 4 mm, 24-lead LFCSP package APPLICATIONS Communication systems Medical systems Audio and video signal routing Automatic test equipment Data acquisition systems Battery-powered systems Sample-and-hold systems Relay replacements GENERAL DESCRIPTION
signals. The ADGS1612 exhibits break-before-make switching The ADGS1612 contains four independent single-pole/single- action for use in multiplexer applications. Note that throughout throw (SPST) switches. A serial peripheral interface (SPI) controls this data sheet, the multifunction pin, RESET/VL, is referred to the switches. The SPI interface has robust error detection features, either by the entire pin name or by a single function of the pin, including cyclic redundancy check (CRC) error detection, for example, VL, when only that function is relevant. invalid read/write address detection, and serial clock (SCLK)
PRODUCT HIGHLIGHTS
count error detection. 1. The SPI interface removes the need for parallel conversion It is possible to daisy-chain multiple ADGS1612 devices together. and logic traces and reduces general-purpose input/output Daisy-chaining enables the configuration of multiple devices with a (GPIO) channel count. minimal amount of digital lines. The ADGS1612 can also operate 2. Daisy-chain mode removes additional logic traces when in burst mode to decrease the time between SPI commands. multiple devices are used. Each switch conducts equally well in both directions when on, and 3. CRC, invalid read/write address, and SCLK count error each switch has an input signal range that extends to the supplies. detection ensure a robust digital interface. In the off condition, signal levels up to the supplies are blocked. 4. CRC error detection capabilities allow the use of the ADGS1612 in safety critical systems. The ultralow on resistance (RON) of these switches make them 5. Guaranteed break-before-make switching allows the use of ideal solutions for data acquisition and gain switching the ADGS1612 in multiplexer configurations with external applications where low RON and low distortion are critical. The wiring. RON profile is very flat over the full analog input range, ensuring 6. Minimum distortion. excellent linearity and low distortion when switching audio
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Document Outline Features Applications Functional Block Diagram General Description Product Highlights Revision History Specifications ±5 V Dual Supply 12 V Single Supply 5 V Single Supply 3.3 V Single Supply Continuous Current per Channel, Sx or Dx Timing Characteristics Timing Diagrams Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Test Circuits Terminology Theory of Operation Address Mode Error Detection Features Cyclic Redundancy Check (CRC) Error Detection SCLK Count Error Detection Invalid Read/Write Address Error Clearing the Error Flags Register Burst Mode Software Reset Daisy-Chain Mode Power-On Reset Applications Information Break-Before-Make Switching Digital Input Buffers Power Supply Rails Register Summary Register Details Switch Data Register Address: 0x01, Reset: 0x00, Name: SW_DATA Error Configuration Register Address: 0x02, Reset: 0x06, Name: ERR_CONFIG Error Flags Register Address: 0x03, Reset: 0x00, Name: ERR_FLAGS Burst Enable Register Address: 0x05, Reset: 0x00, Name: BURST_EN Software Reset Register Address: 0x0B, Reset: 0x00, Name: SOFT_RESETB Outline Dimensions Ordering Guide