Datasheet STFW4N150, STP4N150, STW4N150 (STMicroelectronics) - 4

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Electrical characteristics STFW4N150, STP4N150, STW4N150 2 Electrical characteristics
(TCASE = 25 °C unless otherwise specified)
Table 5. On/off states Symbol Parameter Test conditions Min. Typ. Max. Unit
Drain-source V(BR)DSS I Breakdown voltage D = 1 mA, VGS = 0 1500 V Zero gate voltage V 10 µA I DS = Max rating DSS Drain current (VGS = 0) VDS = Max rating, TC = 125 °C 500 µA Gate-body leakage IGSS V current (V GS = ± 30 V ± 100 nA DS = 0) VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 3 4 5 V Static drain-source on RDS(on V resistance GS = 10 V, ID = 2 A 5 7 Ω
Table 6. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit
g (1) fs Forward transconductance VDS = 30 V, ID = 2 A - 3.5 S Input capacitance Ciss 1300 pF Output capacitance V C DS = 25 V, f = 1 MHz, oss - 120 pF Reverse transfer V C GS = 0 rss 12 pF capacitance td(on) Turn-on delay time 35 ns V T DD = 750 V, ID = 2 A, r Rise time 30 ns R - t G = 4.7 Ω, VGS = 10 V d(off) Turn-off delay time 45 ns Figure 19 tf Fall time 45 ns Qg Total gate charge VDD = 600 V, ID = 4 A, 30 50 nC Qgs Gate-source charge VGS = 10 V - 10 nC Q Figure 20 gd Gate-drain charge 9 nC 1. Pulsed: pulse duration=300 µs, duty cycle 1.5% 4/15 Doc ID 11262 Rev 9 Document Outline Figure 1. Internal schematic diagram. Table 1. Device summary 1 Electrical ratings Table 2. Absolute maximum ratings Table 3. Thermal data Table 4. Avalanche characteristics 2 Electrical characteristics Table 5. On/off states Table 6. Dynamic Table 7. Source drain diode 2.1 Electrical characteristics (curves) Figure 2. Safe operating area for TO-220 Figure 3. Thermal impedance for TO-220 Figure 4. Safe operating area for TO-3PF Figure 5. Thermal impedance for TO-3PF Figure 6. Safe operating area for TO-247 Figure 7. Thermal impedance for TO-247 Figure 8. Output characteristics Figure 9. Transfer characteristics Figure 10. Transconductance Figure 11. Static drain-source on resistance Figure 12. Gate charge vs gate-source voltage Figure 13. Capacitance variations Figure 14. Normalized gate threshold voltage vs temperature Figure 15. Normalized on resistance vs temperature Figure 16. Source-drain diode forward characteristics Figure 17. Normalized BVDSS vs temperature Figure 18. Maximum avalanche energy vs temperature 3 Test circuits Figure 19. Switching times test circuit for resistive load Figure 20. Gate charge test circuit Figure 21. Test circuit for inductive load switching and diode recovery times Figure 22. Unclamped inductive load test circuit Figure 23. Unclamped inductive waveform Figure 24. Switching time waveform 4 Package mechanical data 5 Revision history Table 8. Document revision history